From e5440a966ef8e7569550c8fe4b9ff3ae08459898 Mon Sep 17 00:00:00 2001 From: Bunnaroath Sou Date: Thu, 31 Jan 2019 14:34:23 -0800 Subject: Update BSP files after unit test e24 clic interrupts --- bsp/coreip-e24-arty/design.dts | 114 ++++++++++++++++++++--------------------- bsp/coreip-e24-arty/mee.h | 70 ++++++++++++++----------- bsp/coreip-e24-arty/mee.lds | 21 +++++--- bsp/coreip-e31-arty/mee.h | 8 ++- bsp/coreip-e31/mee.h | 6 +++ bsp/coreip-s51-arty/mee.h | 8 ++- bsp/coreip-s51/mee.h | 6 +++ bsp/freedom-e310-arty/mee.h | 8 ++- bsp/sifive-hifive1/mee.h | 8 ++- 9 files changed, 152 insertions(+), 97 deletions(-) diff --git a/bsp/coreip-e24-arty/design.dts b/bsp/coreip-e24-arty/design.dts index 29ffd4e..780cc7b 100644 --- a/bsp/coreip-e24-arty/design.dts +++ b/bsp/coreip-e24-arty/design.dts @@ -7,15 +7,15 @@ model = "SiFive,FE240G"; chosen { stdout-path = "/soc/serial@20000000:115200"; - mee,entry = <&L11 0x400000>; + mee,entry = <&L7 0x400000>; }; L17: aliases { - serial0 = &L10; + serial0 = &L6; }; L16: cpus { #address-cells = <1>; #size-cells = <0>; - L3: cpu@0 { + L4: cpu@0 { clock-frequency = <0>; compatible = "sifive,caboose0", "riscv"; device_type = "cpu"; @@ -23,7 +23,7 @@ riscv,isa = "rv32imafc"; status = "okay"; timebase-frequency = <1000000>; - L2: interrupt-controller { + L3: interrupt-controller { #interrupt-cells = <1>; compatible = "riscv,cpu-intc"; interrupt-controller; @@ -35,35 +35,34 @@ #size-cells = <1>; compatible = "SiFive,FE240G-soc", "fe240-soc", "sifive-soc", "simple-bus"; ranges; - hfclk: clock@0 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32500000>; - }; - L0: debug-controller@0 { + hfclk: clock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32500000>; + }; + L2: debug-controller@0 { compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L2 65535>; + interrupts-extended = <&L3 65535>; reg = <0x0 0x1000>; reg-names = "control"; }; - L9: error-device@3000 { + L0: error-device@3000 { compatible = "sifive,error0"; reg = <0x3000 0x1000>; - reg-names = "mem"; }; - L7: global-external-interrupts { + L12: global-external-interrupts { compatible = "sifive,global-external-interrupts0"; interrupt-parent = <&L1>; - interrupts = <0 1 2 3>; + interrupts = <22 23 24 25>; }; - L12: gpio@20002000 { + L5: gpio@20002000 { #gpio-cells = <2>; #interrupt-cells = <2>; - compatible = "sifive,gpio0"; + compatible = "sifive,gpio0", "sifive,gpio1"; gpio-controller; interrupt-controller; interrupt-parent = <&L1>; - interrupts = <6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21>; + interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; reg = <0x20002000 0x1000>; reg-names = "control"; }; @@ -71,122 +70,123 @@ #interrupt-cells = <1>; compatible = "sifive,clic0"; interrupt-controller; - interrupts-extended = <&L2 3 &L2 7 &L2 11>; + interrupts-extended = <&L3 3 &L3 7 &L3 11>; reg = <0x2000000 0x1000000>; reg-names = "control"; - sifive,numints = <143>; + sifive,numints = <169>; sifive,numlevels = <16>; + sifive,numintbits = <4>; }; - L8: local-external-interrupts-0 { + L13: local-external-interrupts-0 { compatible = "sifive,local-external-interrupts0"; interrupt-parent = <&L1>; interrupts = <26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152>; }; - L13: pwm@20005000 { + L8: pwm@20005000 { compatible = "sifive,pwm0"; interrupt-parent = <&L1>; - interrupts = <22 23 24 25>; + interrupts = <18 19 20 21>; reg = <0x20005000 0x1000>; reg-names = "control"; }; - L10: serial@20000000 { + L6: serial@20000000 { compatible = "sifive,uart0"; interrupt-parent = <&L1>; - interrupts = <4>; + interrupts = <16>; reg = <0x20000000 0x1000>; reg-names = "control"; - clocks = <&hfclk>; + clocks = <&hfclk>; }; - L11: spi@20004000 { + L7: spi@20004000 { #address-cells = <1>; #size-cells = <0>; compatible = "sifive,spi0"; interrupt-parent = <&L1>; - interrupts = <5>; + interrupts = <17>; reg = <0x20004000 0x1000 0x40000000 0x20000000>; reg-names = "control", "mem"; }; - L5: sys-sram@80000000 { + L10: sys-sram-0@80000000 { compatible = "sifive,sram0"; reg = <0x80000000 0x8000>; reg-names = "mem"; }; - L6: sys-sram@80008000 { + L11: sys-sram-1@80008000 { compatible = "sifive,sram0"; reg = <0x80008000 0x8000>; reg-names = "mem"; }; - led@0red { - compatible = "sifive,gpio-leds"; - label = "LD0red"; - gpios = <&L12 0>; - linux,default-trigger = "none"; - }; + led@0red { + compatible = "sifive,gpio-leds"; + label = "LD0red"; + gpios = <&L5 0>; + linux,default-trigger = "none"; + }; led@0green { - compatible = "sifive,gpio-leds"; + compatible = "sifive,gpio-leds"; label = "LD0green"; - gpios = <&L12 1>; + gpios = <&L5 1>; linux,default-trigger = "none"; }; led@0blue { - compatible = "sifive,gpio-leds"; + compatible = "sifive,gpio-leds"; label = "LD0blue"; - gpios = <&L12 2>; + gpios = <&L5 2>; linux,default-trigger = "none"; }; button@0 { - compatible = "sifive,gpio-buttons"; + compatible = "sifive,gpio-buttons"; label = "BTN0"; - gpios = <&L12 4>; - interrupts-extended = <&L8 4>; + gpios = <&L5 4>; + interrupts-extended = <&L13 9>; linux,code = "none"; }; button@1 { - compatible = "sifive,gpio-buttons"; + compatible = "sifive,gpio-buttons"; label = "BTN1"; - gpios = <&L12 5>; - interrupts-extended = <&L8 5>; + gpios = <&L5 5>; + interrupts-extended = <&L13 10>; linux,code = "none"; }; button@2 { - compatible = "sifive,gpio-buttons"; + compatible = "sifive,gpio-buttons"; label = "BTN2"; - gpios = <&L12 6>; - interrupts-extended = <&L8 6>; + gpios = <&L5 6>; + interrupts-extended = <&L13 11>; linux,code = "none"; }; button@3 { - compatible = "sifive,gpio-buttons"; + compatible = "sifive,gpio-buttons"; label = "BTN3"; - gpios = <&L12 7>; - interrupts-extended = <&L8 7>; + gpios = <&L5 7>; + interrupts-extended = <&L13 12>; linux,code = "none"; }; switch@0 { compatible = "sifive,gpio-switches"; label = "SW0"; - interrupts-extended = <&L7 0>; + interrupts-extended = <&L12 0>; linux,code = "none"; }; switch@1 { compatible = "sifive,gpio-switches"; label = "SW1"; - interrupts-extended = <&L7 1>; + interrupts-extended = <&L12 1>; linux,code = "none"; }; switch@2 { compatible = "sifive,gpio-switches"; label = "SW2"; - interrupts-extended = <&L7 2>; + interrupts-extended = <&L12 2>; linux,code = "none"; }; switch@3 { compatible = "sifive,gpio-switches"; label = "SW3"; - interrupts-extended = <&L8 3>; + interrupts-extended = <&L13 8>; linux,code = "none"; }; - L4: teststatus@4000 { + L9: teststatus@4000 { compatible = "sifive,test0"; reg = <0x4000 0x1000>; reg-names = "control"; diff --git a/bsp/coreip-e24-arty/mee.h b/bsp/coreip-e24-arty/mee.h index a8b1eec..08f5116 100644 --- a/bsp/coreip-e24-arty/mee.h +++ b/bsp/coreip-e24-arty/mee.h @@ -3,9 +3,17 @@ #ifndef COREIP_E24_ARTY__MEE_H #define COREIP_E24_ARTY__MEE_H +#ifdef __MEE_MACHINE_MACROS +#define __MEE_CLIC_SUBINTERRUPTS 169 + +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_INTERRUPT_CONTROLLER_2000000_INTERRUPTS 3 #define MEE_MAX_CLIC_INTERRUPTS __MEE_INTERRUPT_CONTROLLER_2000000_INTERRUPTS +#define __MEE_CLIC_SUBINTERRUPTS 169 + #define __MEE_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 127 #define MEE_MAX_LOCAL_EXT_INTERRUPTS __MEE_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS @@ -16,7 +24,7 @@ #define MEE_MAX_GPIO_INTERRUPTS __MEE_GPIO_20002000_INTERRUPTS #define __MEE_SERIAL_20000000_INTERRUPTS 1 -#define MEE_MAX_UART_INTERRUPTS __MEE_SERIAL_20000000_INTERRUPTS +#define MEE_MAX_UART_INTERRUPTS 1 #include #include @@ -153,9 +161,9 @@ struct __mee_driver_sifive_clic0 __mee_dt_interrupt_controller_2000000 = { .interrupt_parent = &__mee_dt_interrupt_controller.controller, .interrupt_lines[0] = 3, .interrupt_lines[1] = 7, - .interrupt_parent = &__mee_dt_interrupt_controller.controller, - .interrupt_lines[0] = 11, - .num_subinterrupts = 143UL, + .interrupt_lines[2] = 11, + .num_subinterrupts = 169UL, + .num_intbits = 4UL, .max_levels = 16UL, .interrupt_controller = 1, }; @@ -315,10 +323,10 @@ struct __mee_driver_sifive_global_external_interrupts0 __mee_dt_global_external_ /* From interrupt_controller@2000000 */ .interrupt_parent = &__mee_dt_interrupt_controller_2000000.controller, .num_interrupts = MEE_MAX_GLOBAL_EXT_INTERRUPTS, - .interrupt_lines[0] = 0, - .interrupt_lines[1] = 1, - .interrupt_lines[2] = 2, - .interrupt_lines[3] = 3, + .interrupt_lines[0] = 22, + .interrupt_lines[1] = 23, + .interrupt_lines[2] = 24, + .interrupt_lines[3] = 25, }; /* From global_external_interrupts */ @@ -334,22 +342,22 @@ struct __mee_driver_sifive_gpio0 __mee_dt_gpio_20002000 = { /* From interrupt_controller@2000000 */ .interrupt_parent = &__mee_dt_interrupt_controller_2000000.controller, .num_interrupts = MEE_MAX_GPIO_INTERRUPTS, - .interrupt_lines[0] = 6, - .interrupt_lines[1] = 7, - .interrupt_lines[2] = 8, - .interrupt_lines[3] = 9, - .interrupt_lines[4] = 10, - .interrupt_lines[5] = 11, - .interrupt_lines[6] = 12, - .interrupt_lines[7] = 13, - .interrupt_lines[8] = 14, - .interrupt_lines[9] = 15, - .interrupt_lines[10] = 16, - .interrupt_lines[11] = 17, - .interrupt_lines[12] = 18, - .interrupt_lines[13] = 19, - .interrupt_lines[14] = 20, - .interrupt_lines[15] = 21, + .interrupt_lines[0] = 0, + .interrupt_lines[1] = 1, + .interrupt_lines[2] = 2, + .interrupt_lines[3] = 3, + .interrupt_lines[4] = 4, + .interrupt_lines[5] = 5, + .interrupt_lines[6] = 6, + .interrupt_lines[7] = 7, + .interrupt_lines[8] = 8, + .interrupt_lines[9] = 9, + .interrupt_lines[10] = 10, + .interrupt_lines[11] = 11, + .interrupt_lines[12] = 12, + .interrupt_lines[13] = 13, + .interrupt_lines[14] = 14, + .interrupt_lines[15] = 15, }; /* From serial@20000000 */ @@ -364,7 +372,7 @@ struct __mee_driver_sifive_uart0 __mee_dt_serial_20000000 = { /* From interrupt_controller@2000000 */ .interrupt_parent = &__mee_dt_interrupt_controller_2000000.controller, .num_interrupts = MEE_MAX_UART_INTERRUPTS, - .interrupt_line = 4UL, + .interrupt_line = 16UL, }; /* From led@0red */ @@ -406,7 +414,7 @@ struct __mee_driver_sifive_gpio_button __mee_dt_button_0 = { .pin = 4UL, /* From local_external_interrupts_0 */ .interrupt_parent = &__mee_dt_local_external_interrupts_0.irc, - .interrupt_line = 4UL, + .interrupt_line = 9UL, .label = "BTN0", }; @@ -419,7 +427,7 @@ struct __mee_driver_sifive_gpio_button __mee_dt_button_1 = { .pin = 5UL, /* From local_external_interrupts_0 */ .interrupt_parent = &__mee_dt_local_external_interrupts_0.irc, - .interrupt_line = 5UL, + .interrupt_line = 10UL, .label = "BTN1", }; @@ -432,7 +440,7 @@ struct __mee_driver_sifive_gpio_button __mee_dt_button_2 = { .pin = 6UL, /* From local_external_interrupts_0 */ .interrupt_parent = &__mee_dt_local_external_interrupts_0.irc, - .interrupt_line = 6UL, + .interrupt_line = 11UL, .label = "BTN2", }; @@ -445,7 +453,7 @@ struct __mee_driver_sifive_gpio_button __mee_dt_button_3 = { .pin = 7UL, /* From local_external_interrupts_0 */ .interrupt_parent = &__mee_dt_local_external_interrupts_0.irc, - .interrupt_line = 7UL, + .interrupt_line = 12UL, .label = "BTN3", }; @@ -485,7 +493,7 @@ struct __mee_driver_sifive_gpio_switch __mee_dt_switch_3 = { .flip.vtable = &__mee_driver_vtable_sifive_switch.switch_vtable, /* From local_external_interrupts_0 */ .interrupt_parent = &__mee_dt_local_external_interrupts_0.irc, - .interrupt_line = 3UL, + .interrupt_line = 8UL, .label = "SW3", }; @@ -541,6 +549,8 @@ struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { &__mee_dt_switch_2, &__mee_dt_switch_3}; +#endif + #endif /*MEE__MACHINE__COREIP_E24_ARTY__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/coreip-e24-arty/mee.lds b/bsp/coreip-e24-arty/mee.lds index b38f6ac..11d42ea 100644 --- a/bsp/coreip-e24-arty/mee.lds +++ b/bsp/coreip-e24-arty/mee.lds @@ -4,7 +4,7 @@ ENTRY(_enter) MEMORY { - ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x8000 + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 flash (rxai!w) : ORIGIN = 0x40400000, LENGTH = 0x20000000 } @@ -19,7 +19,8 @@ PHDRS SECTIONS { - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x800; + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; .init : @@ -199,18 +200,26 @@ SECTIONS PROVIDE( _end = . ); PROVIDE( end = . ); PROVIDE( mee_segment_bss_target_end = . ); - PROVIDE( mee_segment_heap_target_start = . ); - .stack ORIGIN(ram) + LENGTH(ram) - __stack_size : + .stack : { - PROVIDE( mee_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); + PROVIDE(mee_segment_stack_begin = .); . = __stack_size; PROVIDE( _sp = . ); PROVIDE(mee_segment_stack_end = .); } >ram AT>ram :ram + .heap : + { + PROVIDE( mee_segment_heap_target_start = . ); + . = __heap_size; + . = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram); + PROVIDE( mee_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + } >ram AT>ram :ram + + } diff --git a/bsp/coreip-e31-arty/mee.h b/bsp/coreip-e31-arty/mee.h index 80c7822..cc004cf 100644 --- a/bsp/coreip-e31-arty/mee.h +++ b/bsp/coreip-e31-arty/mee.h @@ -3,6 +3,10 @@ #ifndef COREIP_E31_ARTY__MEE_H #define COREIP_E31_ARTY__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -19,7 +23,7 @@ #define MEE_MAX_GPIO_INTERRUPTS __MEE_GPIO_20002000_INTERRUPTS #define __MEE_SERIAL_20000000_INTERRUPTS 1 -#define MEE_MAX_UART_INTERRUPTS __MEE_SERIAL_20000000_INTERRUPTS +#define MEE_MAX_UART_INTERRUPTS 1 #include #include @@ -464,6 +468,8 @@ struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { &__mee_dt_switch_2, &__mee_dt_switch_3}; +#endif + #endif /*MEE__MACHINE__COREIP_E31_ARTY__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/coreip-e31/mee.h b/bsp/coreip-e31/mee.h index 068af63..0153af4 100644 --- a/bsp/coreip-e31/mee.h +++ b/bsp/coreip-e31/mee.h @@ -3,6 +3,10 @@ #ifndef COREIP_E31__MEE_H #define COREIP_E31__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -331,6 +335,8 @@ struct __mee_driver_sifive_gpio_button *__mee_button_table[] = { asm (".weak __mee_switch_table"); struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { NULL }; +#endif + #endif /*MEE__MACHINE__COREIP_E31__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/coreip-s51-arty/mee.h b/bsp/coreip-s51-arty/mee.h index d8a3ebb..2986388 100644 --- a/bsp/coreip-s51-arty/mee.h +++ b/bsp/coreip-s51-arty/mee.h @@ -3,6 +3,10 @@ #ifndef COREIP_S51_ARTY__MEE_H #define COREIP_S51_ARTY__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -19,7 +23,7 @@ #define MEE_MAX_GPIO_INTERRUPTS __MEE_GPIO_20002000_INTERRUPTS #define __MEE_SERIAL_20000000_INTERRUPTS 1 -#define MEE_MAX_UART_INTERRUPTS __MEE_SERIAL_20000000_INTERRUPTS +#define MEE_MAX_UART_INTERRUPTS 1 #include #include @@ -464,6 +468,8 @@ struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { &__mee_dt_switch_2, &__mee_dt_switch_3}; +#endif + #endif /*MEE__MACHINE__COREIP_S51_ARTY__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/coreip-s51/mee.h b/bsp/coreip-s51/mee.h index a6d3add..7d9b884 100644 --- a/bsp/coreip-s51/mee.h +++ b/bsp/coreip-s51/mee.h @@ -3,6 +3,10 @@ #ifndef COREIP_S51__MEE_H #define COREIP_S51__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -459,6 +463,8 @@ struct __mee_driver_sifive_gpio_button *__mee_button_table[] = { asm (".weak __mee_switch_table"); struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { NULL }; +#endif + #endif /*MEE__MACHINE__COREIP_S51__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/freedom-e310-arty/mee.h b/bsp/freedom-e310-arty/mee.h index c9f4220..695d43f 100644 --- a/bsp/freedom-e310-arty/mee.h +++ b/bsp/freedom-e310-arty/mee.h @@ -3,6 +3,10 @@ #ifndef FREEDOM_E310_ARTY__MEE_H #define FREEDOM_E310_ARTY__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -16,7 +20,7 @@ #define MEE_MAX_GPIO_INTERRUPTS __MEE_GPIO_10012000_INTERRUPTS #define __MEE_SERIAL_10013000_INTERRUPTS 1 -#define MEE_MAX_UART_INTERRUPTS __MEE_SERIAL_10013000_INTERRUPTS +#define MEE_MAX_UART_INTERRUPTS 1 #include #include @@ -231,6 +235,8 @@ struct __mee_driver_sifive_gpio_button *__mee_button_table[] = { asm (".weak __mee_switch_table"); struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { NULL }; +#endif + #endif /*MEE__MACHINE__FREEDOM_E310_ARTY__MEE_H*/ #endif/*ASSEMBLY*/ diff --git a/bsp/sifive-hifive1/mee.h b/bsp/sifive-hifive1/mee.h index 0357ce8..597f1fa 100644 --- a/bsp/sifive-hifive1/mee.h +++ b/bsp/sifive-hifive1/mee.h @@ -3,6 +3,10 @@ #ifndef SIFIVE_HIFIVE1__MEE_H #define SIFIVE_HIFIVE1__MEE_H +#ifdef __MEE_MACHINE_MACROS +#endif + +#ifndef __MEE_MACHINE_MACROS #define __MEE_CLINT_2000000_INTERRUPTS 2 #define MEE_MAX_CLINT_INTERRUPTS __MEE_CLINT_2000000_INTERRUPTS @@ -16,7 +20,7 @@ #define MEE_MAX_GPIO_INTERRUPTS __MEE_GPIO_10012000_INTERRUPTS #define __MEE_SERIAL_10013000_INTERRUPTS 1 -#define MEE_MAX_UART_INTERRUPTS __MEE_SERIAL_10013000_INTERRUPTS +#define MEE_MAX_UART_INTERRUPTS 1 #include #include @@ -324,6 +328,8 @@ struct __mee_driver_sifive_gpio_button *__mee_button_table[] = { asm (".weak __mee_switch_table"); struct __mee_driver_sifive_gpio_switch *__mee_switch_table[] = { NULL }; +#endif + #endif /*MEE__MACHINE__SIFIVE_HIFIVE1__MEE_H*/ #endif/*ASSEMBLY*/ -- cgit v1.2.3