From 96f7c530cc7ec894ed8c326a47dc496fb7b9c35f Mon Sep 17 00:00:00 2001 From: Bunnaroath Sou Date: Tue, 26 Mar 2019 12:07:46 -0700 Subject: Making dhrystone public --- .gitmodules | 3 +++ bsp/coreip-e31-arty/settings.mk | 2 +- bsp/coreip-e31-rtl/settings.mk | 2 +- software/dhrystone | 1 + 4 files changed, 6 insertions(+), 2 deletions(-) create mode 160000 software/dhrystone diff --git a/.gitmodules b/.gitmodules index bd6e9c4..5c6f9e1 100644 --- a/.gitmodules +++ b/.gitmodules @@ -40,3 +40,6 @@ [submodule "software/sifive-welcome"] path = software/sifive-welcome url = https://github.com/sifive/sifive-welcome +[submodule "software/dhrystone"] + path = software/dhrystone + url = https://github.com/sifive/benchmark-dhrystone diff --git a/bsp/coreip-e31-arty/settings.mk b/bsp/coreip-e31-arty/settings.mk index 0b9c2cb..c2a2547 100644 --- a/bsp/coreip-e31-arty/settings.mk +++ b/bsp/coreip-e31-arty/settings.mk @@ -1,5 +1,5 @@ RISCV_ARCH=rv32imac RISCV_ABI=ilp32 -RISCV_CMODEL=medlow +RISCV_CMODEL=medany TARGET_TAGS=fpga openocd diff --git a/bsp/coreip-e31-rtl/settings.mk b/bsp/coreip-e31-rtl/settings.mk index f60f250..50ec3c7 100644 --- a/bsp/coreip-e31-rtl/settings.mk +++ b/bsp/coreip-e31-rtl/settings.mk @@ -1,6 +1,6 @@ RISCV_ARCH=rv32imac RISCV_ABI=ilp32 -RISCV_CMODEL=medlow +RISCV_CMODEL=medany COREIP_MEM_WIDTH=32 diff --git a/software/dhrystone b/software/dhrystone new file mode 160000 index 0000000..1472b50 --- /dev/null +++ b/software/dhrystone @@ -0,0 +1 @@ +Subproject commit 1472b5092fa52551670908aa15d48eb974ccd453 -- cgit v1.2.3 From 9fa72b0f146f19cdb2fb407f8be5c3d8c4af2f46 Mon Sep 17 00:00:00 2001 From: Bunnaroath Sou Date: Tue, 26 Mar 2019 14:30:38 -0700 Subject: Update readme to include dhrystone --- README.md | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/README.md b/README.md index 2b5a36b..1773137 100644 --- a/README.md +++ b/README.md @@ -92,6 +92,8 @@ operating systems to RISC-V. - Demonstrates how to configure a Physical Memory Protection (PMP) region - sifive-welcome - Prints the SiFive banner and blinks LEDs + - dhrystone + - "Dhrystone" Benchmark Program by Reinhold P. Weicker ### Setting up the SDK ### @@ -181,6 +183,16 @@ with the `release` configuration, you would instead run the command make PROGRAM=timer-interrupt TARGET=coreip-s51-arty CONFIGURATION=release software ``` +##### Building an Benchmark Program #### + +Building a benchmark program is slightly special in that certain section is +required to be loaded in specific memory region. A specialize linker file has +been created for its optimal run. + +``` +make PROGRAM=dhrystone TARGET=coreip-e31-arty LINK_TARGET=ramrodata software +``` + #### Uploading to the Target Board #### ``` -- cgit v1.2.3 From 0045570bc60f197a8c9e63d4330e1fba9238ce83 Mon Sep 17 00:00:00 2001 From: Bunnaroath Sou Date: Tue, 26 Mar 2019 14:45:36 -0700 Subject: Update sphinx doc to include dhrystone --- doc/sphinx/contents.rst | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/doc/sphinx/contents.rst b/doc/sphinx/contents.rst index ed1b6af..ab751d9 100644 --- a/doc/sphinx/contents.rst +++ b/doc/sphinx/contents.rst @@ -134,3 +134,8 @@ The example programs can be found under the ``software/`` directory. - example-spi - Demonstrates how to use the SPI API to transfer bytes to a peripheral + +- dhrystone + + - "Dhrystone" Benchmark Program by Reinhold P. Weicker + -- cgit v1.2.3