From 809711e87af06ca5c151a2fac568382330f2feb6 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 14 Jun 2017 08:52:57 -0700 Subject: New Freedom Studio Examples (#66) * examples ported to ilg build plugin * project cleanup * CoreplexIP-E31 ilg projects * E51FPGA ilg projects * Tested Debug * debug launch files * E31 Debug Launch Files * removed typo project * E51 launch files. Forgotten E31 File * Missing coreplexip files * examples ported to ilg build plugin * project cleanup * CoreplexIP-E31 ilg projects * E51FPGA ilg projects * Tested Debug * debug launch files * E31 Debug Launch Files * removed typo project * E51 launch files. Forgotten E31 File * Missing coreplexip files * starting fresh * HiFive1 demo_gpio and libwrap * hifive1 hello * debug launchers for hello and demo_gpio * hifive1 led_fade * led_fade: Since E300 Arty Dev Kit doesn't have a PRCI, the led_fade demo doesn't really work on it. * update include paths to ease generating stand-alone zips * Adding E51 Examples * E51 demo launch files * E31 Demos * E31 demo launch files --- .../E51FPGA/performance_counters/.cproject | 217 ++++++++++++++++++++ .../E51FPGA/performance_counters/.gitignore | 1 + .../E51FPGA/performance_counters/.project | 228 +++++++++++++++++++++ .../performance_counters Debug.launch | 59 ++++++ .../sifive-coreplexip-e51-arty.cfg | 31 +++ 5 files changed, 536 insertions(+) create mode 100644 FreedomStudio/E51FPGA/performance_counters/.cproject create mode 100644 FreedomStudio/E51FPGA/performance_counters/.gitignore create mode 100644 FreedomStudio/E51FPGA/performance_counters/.project create mode 100644 FreedomStudio/E51FPGA/performance_counters/performance_counters Debug.launch create mode 100644 FreedomStudio/E51FPGA/performance_counters/sifive-coreplexip-e51-arty.cfg (limited to 'FreedomStudio/E51FPGA/performance_counters') diff --git a/FreedomStudio/E51FPGA/performance_counters/.cproject b/FreedomStudio/E51FPGA/performance_counters/.cproject new file mode 100644 index 0000000..9ca2de1 --- /dev/null +++ b/FreedomStudio/E51FPGA/performance_counters/.cproject @@ -0,0 +1,217 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/FreedomStudio/E51FPGA/performance_counters/.gitignore b/FreedomStudio/E51FPGA/performance_counters/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/FreedomStudio/E51FPGA/performance_counters/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/FreedomStudio/E51FPGA/performance_counters/.project b/FreedomStudio/E51FPGA/performance_counters/.project new file mode 100644 index 0000000..6986ffb --- /dev/null +++ b/FreedomStudio/E51FPGA/performance_counters/.project @@ -0,0 +1,228 @@ + + + performance_counters + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + bsp + 2 + virtual:/virtual + + + performance_counters.c + 1 + PARENT-3-PROJECT_LOC/software/performance_counters/performance_counters.c + + + bsp/.DS_Store + 1 + PARENT-3-PROJECT_LOC/bsp/.DS_Store + + + bsp/drivers + 2 + virtual:/virtual + + + bsp/env + 2 + virtual:/virtual + + + bsp/include + 2 + virtual:/virtual + + + bsp/drivers/.DS_Store + 1 + PARENT-3-PROJECT_LOC/bsp/drivers/.DS_Store + + + bsp/drivers/fe300prci + 2 + virtual:/virtual + + + bsp/drivers/plic + 2 + virtual:/virtual + + + bsp/env/.DS_Store + 1 + PARENT-3-PROJECT_LOC/bsp/env/.DS_Store + + + bsp/env/coreplexip-arty.h + 1 + PARENT-3-PROJECT_LOC/bsp/env/coreplexip-arty.h + + + bsp/env/coreplexip-e51-arty + 2 + virtual:/virtual + + + bsp/env/encoding.h + 1 + PARENT-3-PROJECT_LOC/bsp/env/encoding.h + + + bsp/env/entry.S + 1 + PARENT-3-PROJECT_LOC/bsp/env/entry.S + + + bsp/env/hifive1.h + 1 + PARENT-3-PROJECT_LOC/bsp/env/hifive1.h + + + bsp/env/start.S + 1 + PARENT-3-PROJECT_LOC/bsp/env/start.S + + + bsp/include/.DS_Store + 1 + PARENT-3-PROJECT_LOC/bsp/include/.DS_Store + + + bsp/include/sifive + 2 + virtual:/virtual + + + bsp/drivers/fe300prci/fe300prci_driver.c + 1 + PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.c + + + bsp/drivers/fe300prci/fe300prci_driver.h + 1 + PARENT-3-PROJECT_LOC/bsp/drivers/fe300prci/fe300prci_driver.h + + + bsp/drivers/plic/plic_driver.c + 1 + PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.c + + + bsp/drivers/plic/plic_driver.h + 1 + PARENT-3-PROJECT_LOC/bsp/drivers/plic/plic_driver.h + + + bsp/env/coreplexip-e51-arty/init.c + 1 + PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/init.c + + + bsp/env/coreplexip-e51-arty/link.lds + 1 + PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/link.lds + + + bsp/env/coreplexip-e51-arty/openocd.cfg + 1 + PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/openocd.cfg + + + bsp/env/coreplexip-e51-arty/platform.h + 1 + PARENT-3-PROJECT_LOC/bsp/env/coreplexip-e51-arty/platform.h + + + bsp/include/sifive/bits.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/bits.h + + + bsp/include/sifive/const.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/const.h + + + bsp/include/sifive/devices + 2 + virtual:/virtual + + + bsp/include/sifive/sections.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/sections.h + + + bsp/include/sifive/smp.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/smp.h + + + bsp/include/sifive/devices/aon.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/aon.h + + + bsp/include/sifive/devices/clint.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/clint.h + + + bsp/include/sifive/devices/gpio.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/gpio.h + + + bsp/include/sifive/devices/otp.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/otp.h + + + bsp/include/sifive/devices/plic.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/plic.h + + + bsp/include/sifive/devices/prci.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/prci.h + + + bsp/include/sifive/devices/pwm.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/pwm.h + + + bsp/include/sifive/devices/spi.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/spi.h + + + bsp/include/sifive/devices/uart.h + 1 + PARENT-3-PROJECT_LOC/bsp/include/sifive/devices/uart.h + + + diff --git a/FreedomStudio/E51FPGA/performance_counters/performance_counters Debug.launch b/FreedomStudio/E51FPGA/performance_counters/performance_counters Debug.launch new file mode 100644 index 0000000..4b980ad --- /dev/null +++ b/FreedomStudio/E51FPGA/performance_counters/performance_counters Debug.launch @@ -0,0 +1,59 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/FreedomStudio/E51FPGA/performance_counters/sifive-coreplexip-e51-arty.cfg b/FreedomStudio/E51FPGA/performance_counters/sifive-coreplexip-e51-arty.cfg new file mode 100644 index 0000000..8b382dc --- /dev/null +++ b/FreedomStudio/E51FPGA/performance_counters/sifive-coreplexip-e51-arty.cfg @@ -0,0 +1,31 @@ +# JTAG adapter setup +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi_vid_pid 0x15ba 0x002a + +ftdi_layout_init 0x0808 0x0a1b +ftdi_layout_signal nSRST -oe 0x0200 +#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal LED -data 0x0800 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +# Un-comment these two flash lines if you have a SPI flash and want to write +# it. +flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 +init +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z +} +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" -- cgit v1.2.3