From 809711e87af06ca5c151a2fac568382330f2feb6 Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Wed, 14 Jun 2017 08:52:57 -0700
Subject: New Freedom Studio Examples (#66)

* examples ported to ilg build plugin

* project cleanup

* CoreplexIP-E31 ilg projects

* E51FPGA ilg projects

* Tested Debug

* debug launch files

* E31 Debug Launch Files

* removed typo project

* E51 launch files. Forgotten E31 File

* Missing coreplexip files

* examples ported to ilg build plugin

* project cleanup

* CoreplexIP-E31 ilg projects

* E51FPGA ilg projects

* Tested Debug

* debug launch files

* E31 Debug Launch Files

* removed typo project

* E51 launch files. Forgotten E31 File

* Missing coreplexip files

* starting fresh

* HiFive1 demo_gpio and libwrap

* hifive1 hello

* debug launchers for hello and demo_gpio

* hifive1 led_fade

* led_fade: Since E300 Arty Dev Kit doesn't have a PRCI, the led_fade demo doesn't really work on it.

* update include paths to ease generating stand-alone zips

* Adding E51 Examples

* E51 demo launch files

* E31 Demos

* E31 demo launch files
---
 .../led_fade/sifive-freedom-e300-hifive1.cfg       | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 FreedomStudio/HiFive1/led_fade/sifive-freedom-e300-hifive1.cfg

(limited to 'FreedomStudio/HiFive1/led_fade/sifive-freedom-e300-hifive1.cfg')

diff --git a/FreedomStudio/HiFive1/led_fade/sifive-freedom-e300-hifive1.cfg b/FreedomStudio/HiFive1/led_fade/sifive-freedom-e300-hifive1.cfg
new file mode 100644
index 0000000..b0a8e26
--- /dev/null
+++ b/FreedomStudio/HiFive1/led_fade/sifive-freedom-e300-hifive1.cfg
@@ -0,0 +1,34 @@
+adapter_khz     10000
+
+interface ftdi
+ftdi_device_desc "Dual RS232-HS"
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_layout_init 0x0008 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+#Reset Stretcher logic on FE310 is ~1 second long
+#This doesn't apply if you use
+# ftdi_set_signal, but still good to document
+#adapter_nsrst_delay 1500
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
+init
+#reset -- This type of reset is not implemented yet
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+  #Wait for the reset stretcher
+  #It will work without this, but
+  #will incur lots of delays for later commands.
+  sleep 1500
+}	
+halt
+flash protect 0 64 last off
-- 
cgit v1.2.1-18-gbd029