From 2887165ae2990e7f93038f3220ed74ee429b5244 Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Wed, 20 Jul 2016 23:59:02 +0000
Subject: Initial Checkin

---
 bootrom/demo/Makefile      |  5 ++++
 bootrom/demo/demo.S        | 71 ++++++++++++++++++++++++++++++++++++++++++++++
 bootrom/demo/hello_msg.txt | 37 ++++++++++++++++++++++++
 3 files changed, 113 insertions(+)
 create mode 100644 bootrom/demo/Makefile
 create mode 100644 bootrom/demo/demo.S
 create mode 100644 bootrom/demo/hello_msg.txt

(limited to 'bootrom/demo')

diff --git a/bootrom/demo/Makefile b/bootrom/demo/Makefile
new file mode 100644
index 0000000..dfe3663
--- /dev/null
+++ b/bootrom/demo/Makefile
@@ -0,0 +1,5 @@
+PROG := demo
+SRCS := demo.S
+EXTRAS := hello_msg.txt
+
+include ../bram.mk
diff --git a/bootrom/demo/demo.S b/bootrom/demo/demo.S
new file mode 100644
index 0000000..c6f2618
--- /dev/null
+++ b/bootrom/demo/demo.S
@@ -0,0 +1,71 @@
+#define UART_BASE	0x48000000
+#define SPI_BASE	0x48001000
+#define GPIO_BASE	0x48002000
+
+#ifndef CFG_STRING
+#error Must define CFG_STRING
+#endif	
+        
+	.globl _start
+_start:
+	j uart_init
+	nop
+	nop
+	.word cfgstr
+
+uart_init:
+        // a1 = UART_TX
+        // a2 = hello_msg_end
+        // for (a0 = hello_msg_start; a0 != a2; ++ a0){
+        //   while (a3 = TX_READY == 0);
+        //   a3 = *a0
+        //   *a1 = a3
+        // }
+
+        la a0, hello_msg_start
+        la a2, hello_msg_end
+        li a1, UART_BASE
+                
+uart_loop:      
+        lw a3, 4(a1) // Wait until non-zero (uart can send data).
+        beqz a3, uart_loop
+
+        lb a3, 0(a0) // read the next character in hello_msg
+        sw a3, 0(a1) // Write the current character.
+        addi a0, a0, 1 // increment the pointer.
+        bne  a0, a2, uart_loop
+
+gpio_init:   
+	li a0, GPIO_BASE
+        li t0, 0xFFFF0000
+        sw t0, 4(a0)
+        
+gpio_loop:
+        // For Red LEDs, increment manually.
+	li t0, 0x1
+	sw t0, (a0)
+	li t0, 0x2
+	sw t0, (a0)
+	li t0, 0x4
+	sw t0, (a0)
+	li t0, 0x8
+	sw t0, (a0)
+
+        // For Blue and Green LEDs, sample the switches & buttons
+
+        lw   t0, (a0)
+        srli t0, t0, 16
+	andi t0, t0, 0xFF
+        slli t0, t0, 4
+        sw   t0, (a0)
+
+        j gpio_loop
+
+	.section .rodata
+
+hello_msg_start:
+        .incbin "hello_msg.txt"
+hello_msg_end:  
+                
+cfgstr:
+	.incbin CFG_STRING
diff --git a/bootrom/demo/hello_msg.txt b/bootrom/demo/hello_msg.txt
new file mode 100644
index 0000000..c3cb3f2
--- /dev/null
+++ b/bootrom/demo/hello_msg.txt
@@ -0,0 +1,37 @@
+
+                SIFIVE, INC.
+
+         5555555555555555555555555
+        5555                   5555
+       5555                     5555
+      5555                       5555
+     5555       5555555555555555555555
+    5555       555555555555555555555555
+   5555                             5555
+  5555                               5555
+ 5555                                 5555
+5555555555555555555555555555          55555
+ 55555           555555555           55555
+   55555           55555           55555
+     55555           5           55555
+       55555                   55555
+         55555               55555
+           55555           55555
+             55555       55555
+               55555   55555
+                 555555555
+                   55555
+                     5
+
+           SiFive RISC-V Coreplex
+
+Welcome to the Arty FPGA Freedom E Dev Kit. 
+The red LEDs are blinking very fast and appear
+dim. Try pressing the buttons and switches to control
+the blue and green LEDs. You can try using the
+debugger to step through the boot code.
+
+
+
+
+
-- 
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