From 2887165ae2990e7f93038f3220ed74ee429b5244 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 20 Jul 2016 23:59:02 +0000 Subject: Initial Checkin --- bootrom/bram.mk | 79 ++++++++++++++++++++++++++++++++++++++++++++++ bootrom/common/bram.ld | 40 +++++++++++++++++++++++ bootrom/common/mem.awk | 63 ++++++++++++++++++++++++++++++++++++ bootrom/demo/Makefile | 5 +++ bootrom/demo/demo.S | 71 +++++++++++++++++++++++++++++++++++++++++ bootrom/demo/hello_msg.txt | 37 ++++++++++++++++++++++ 6 files changed, 295 insertions(+) create mode 100644 bootrom/bram.mk create mode 100644 bootrom/common/bram.ld create mode 100644 bootrom/common/mem.awk create mode 100644 bootrom/demo/Makefile create mode 100644 bootrom/demo/demo.S create mode 100644 bootrom/demo/hello_msg.txt (limited to 'bootrom') diff --git a/bootrom/bram.mk b/bootrom/bram.mk new file mode 100644 index 0000000..2c7875a --- /dev/null +++ b/bootrom/bram.mk @@ -0,0 +1,79 @@ +ifndef _BRAM_MK +_BRAM_MK := # defined + +BRAM_ADDR := 0x1000 + +BASEDIR := $(dir $(lastword $(MAKEFILE_LIST))) +BASEDIR := $(BASEDIR:/=) +DATADIR := $(BASEDIR)/common + +LDSCRIPT := $(DATADIR)/bram.ld +MEMSCRIPT := $(DATADIR)/mem.awk + +BITFILEDIR := $(BASEDIR)/../bitfile +BITFILE_VERSION ?= 0-1 + +BITFILE := $(BITFILEDIR)/freedom-e300-arty-$(BITFILE_VERSION).bit +CFGFILE := $(BITFILEDIR)/FreedomE-$(BITFILE_VERSION).cfg +MEMINFO := $(BITFILEDIR)/freedom-e300-arty-$(BITFILE_VERSION).mmi +BRAM_INST := `cat $(BITFILEDIR)/freedom-e300-arty-$(BITFILE_VERSION)-bootrom.txt` + +XLEN = 32 +BRAM_WIDTH=64 + +all: mcs + +$(BITFILE): + @echo "In order to get Version $(BITFILE_VERSION) of the bitfile:" + @echo "" + @cat $(BITFILEDIR)/README.md + +CC := ../../toolchain/bin/riscv$(XLEN)-unknown-elf-gcc +UPDATEMEM ?= updatemem + +CDEFINES += -DCFG_STRING=\"$(CFGFILE)\" + +CFLAGS ?= -m$(XLEN) -O2 -std=c11 -pedantic -Wall \ + -nostartfiles -fno-common -mcmodel=medany -g \ + $(CDEFINES) + +LDFLAGS ?= -T$(LDSCRIPT) -static -nostdlib +OBJCOPY ?= objcopy +elf: $(PROG).elf +hex: $(PROG).hex +mem: $(PROG).impl.mem +mcs: $(PROG).mcs + +$(PROG).elf: $(SRCS) $(EXTRAS) $(CFGFILE) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(SRCS) + +$(PROG).hex: $(PROG).elf + $(OBJCOPY) -S -O verilog --change-addresses -$(BRAM_ADDR) $< $@ + +# Manually reverse the byte order due to limitations in UpdateMEM. +# Per UG898: "When UpdateMEM inputs data, it takes data from data input +# files in Bit Lane sized chunks from the most right value first to the +# left most. For example, if the first 64 bits of input data are +# 0xB47DDE02826A8419 then the value 0xB4 is the first value to be set +# into a Block RAM." +$(PROG).impl.mem: $(PROG).hex $(MEMSCRIPT) + awk -v WIDTH=$(BRAM_WIDTH) -v REVERSE=1 -f $(MEMSCRIPT) $< > $@ + +.PHONY: $(PROG).mcs +$(PROG).mcs : $(BITFILE) $(PROG).impl.mem + @echo "" + @echo "" + @echo "TO COMPLETE THE BUILD OF $(PROG).mcs, " + @echo "ENTER THE FOLLOWING IN THE VIVADO TCL WINDOW:" + @echo "" + @echo "cd `pwd`" + @echo "" + @echo "exec $(UPDATEMEM) -meminfo $(MEMINFO) -data $(PROG).impl.mem -proc $(BRAM_INST) -bit $(BITFILE) --out $(PROG).bit -force" + @echo "" + @echo "write_cfgmem -format mcs -interface spix4 -size 16 -loadbit {up 0x0 $(PROG).bit} -file $(PROG).mcs -force" + @echo "" + +clean: + rm -f -- $(foreach ext,elf hex impl.mem bit mcs,$(PROG).$(ext)) + +endif # _BRAM_MK diff --git a/bootrom/common/bram.ld b/bootrom/common/bram.ld new file mode 100644 index 0000000..45df67f --- /dev/null +++ b/bootrom/common/bram.ld @@ -0,0 +1,40 @@ +OUTPUT_ARCH("riscv") +ENTRY(_start) + +MEMORY +{ + rom (rx) : ORIGIN = 0x00001000, LENGTH = 4K + ram (rwx) : ORIGIN = 0x80000000, LENGTH = 256M +} + +SECTIONS +{ + PROVIDE(_rom = ORIGIN(rom)); + PROVIDE(_rom_end = _rom + LENGTH(rom)); + PROVIDE(_ram = ORIGIN(ram)); + PROVIDE(_ram_end = _ram + LENGTH(ram)); + + .text : { + PROVIDE(_ftext = .); + *(.text.init) + *(.text .text.* .gnu.linkonce.t.*) + PROVIDE(_etext = .); + } > rom + + .rodata : { + *(.rodata .rodata.* .gnu.linkonce.r.*) + } > rom + + .bss : ALIGN(8) { + PROVIDE(_fbss = .); + *(.bss .bss.* .gnu.linkonce.b.*) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + . = ALIGN(8); + PROVIDE(_ebss = .); + } > ram + + . += 0x1000; + PROVIDE(_sp = NEXT(0x1000)); + + PROVIDE(_end = .); +} diff --git a/bootrom/common/mem.awk b/bootrom/common/mem.awk new file mode 100644 index 0000000..3003b56 --- /dev/null +++ b/bootrom/common/mem.awk @@ -0,0 +1,63 @@ +BEGIN { + RS = ORS = "\r\n" + addr = 0 + buf = "" + limit = (WIDTH > 0 ? WIDTH / 4 : 16) + print "@00000000" +} + +# Portable strtonum() replacement +function atoi(str, x, n, i, b, c) { + if (str ~ /^0[0-7]*$/) { + i = 2 + b = 8 + } else if (str ~ /^0[xX][[:xdigit:]]+$/) { + i = 3 + b = 16 + } else { + return str + } + + x = 0 + n = length(str) + for (; i <= n; i++) { + c = tolower(substr(str, i , 1)) + c = index("123456789abcdef", c) + x = (x * b) + c + } + return x +} + +function out(x) { + addr++ + buf = (REVERSE ? buf x : x buf) + if (length(buf) >= limit) { + print buf + buf = "" + } +} + +function pad(n) { + while (addr < n) { + out("00") + } +} + +match($1, /^@[[:xdigit:]]+/) { + pad(atoi("0x" substr($1, RSTART+1, RLENGTH-1))) + next +} + +{ + for (i = 1; i <= NF; i++) { + out($i) + } +} + +END { + align = limit / 2 + pad(int((addr + align - 1) / align) * align) + if (length(buf) > 0) { + print buf; + } +} diff --git a/bootrom/demo/Makefile b/bootrom/demo/Makefile new file mode 100644 index 0000000..dfe3663 --- /dev/null +++ b/bootrom/demo/Makefile @@ -0,0 +1,5 @@ +PROG := demo +SRCS := demo.S +EXTRAS := hello_msg.txt + +include ../bram.mk diff --git a/bootrom/demo/demo.S b/bootrom/demo/demo.S new file mode 100644 index 0000000..c6f2618 --- /dev/null +++ b/bootrom/demo/demo.S @@ -0,0 +1,71 @@ +#define UART_BASE 0x48000000 +#define SPI_BASE 0x48001000 +#define GPIO_BASE 0x48002000 + +#ifndef CFG_STRING +#error Must define CFG_STRING +#endif + + .globl _start +_start: + j uart_init + nop + nop + .word cfgstr + +uart_init: + // a1 = UART_TX + // a2 = hello_msg_end + // for (a0 = hello_msg_start; a0 != a2; ++ a0){ + // while (a3 = TX_READY == 0); + // a3 = *a0 + // *a1 = a3 + // } + + la a0, hello_msg_start + la a2, hello_msg_end + li a1, UART_BASE + +uart_loop: + lw a3, 4(a1) // Wait until non-zero (uart can send data). + beqz a3, uart_loop + + lb a3, 0(a0) // read the next character in hello_msg + sw a3, 0(a1) // Write the current character. + addi a0, a0, 1 // increment the pointer. + bne a0, a2, uart_loop + +gpio_init: + li a0, GPIO_BASE + li t0, 0xFFFF0000 + sw t0, 4(a0) + +gpio_loop: + // For Red LEDs, increment manually. + li t0, 0x1 + sw t0, (a0) + li t0, 0x2 + sw t0, (a0) + li t0, 0x4 + sw t0, (a0) + li t0, 0x8 + sw t0, (a0) + + // For Blue and Green LEDs, sample the switches & buttons + + lw t0, (a0) + srli t0, t0, 16 + andi t0, t0, 0xFF + slli t0, t0, 4 + sw t0, (a0) + + j gpio_loop + + .section .rodata + +hello_msg_start: + .incbin "hello_msg.txt" +hello_msg_end: + +cfgstr: + .incbin CFG_STRING diff --git a/bootrom/demo/hello_msg.txt b/bootrom/demo/hello_msg.txt new file mode 100644 index 0000000..c3cb3f2 --- /dev/null +++ b/bootrom/demo/hello_msg.txt @@ -0,0 +1,37 @@ + + SIFIVE, INC. + + 5555555555555555555555555 + 5555 5555 + 5555 5555 + 5555 5555 + 5555 5555555555555555555555 + 5555 555555555555555555555555 + 5555 5555 + 5555 5555 + 5555 5555 +5555555555555555555555555555 55555 + 55555 555555555 55555 + 55555 55555 55555 + 55555 5 55555 + 55555 55555 + 55555 55555 + 55555 55555 + 55555 55555 + 55555 55555 + 555555555 + 55555 + 5 + + SiFive RISC-V Coreplex + +Welcome to the Arty FPGA Freedom E Dev Kit. +The red LEDs are blinking very fast and appear +dim. Try pressing the buttons and switches to control +the blue and green LEDs. You can try using the +debugger to step through the boot code. + + + + + -- cgit v1.2.3