From 02dc7f4f76e4f6c2cb31207b14f261fec49f98ce Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Wed, 3 Apr 2019 12:50:13 -0700 Subject: Update BSPs for Unleashed and U54(MC) Signed-off-by: Nathaniel Graff --- bsp/coreip-e20-rtl/metal.default.lds | 1 + bsp/coreip-e20-rtl/metal.h | 48 +++++++++++++++++++++++---------- bsp/coreip-e20-rtl/metal.ramrodata.lds | 1 + bsp/coreip-e20-rtl/metal.scratchpad.lds | 1 + 4 files changed, 37 insertions(+), 14 deletions(-) (limited to 'bsp/coreip-e20-rtl') diff --git a/bsp/coreip-e20-rtl/metal.default.lds b/bsp/coreip-e20-rtl/metal.default.lds index 4900be7..73490a3 100644 --- a/bsp/coreip-e20-rtl/metal.default.lds +++ b/bsp/coreip-e20-rtl/metal.default.lds @@ -19,6 +19,7 @@ PHDRS SECTIONS { __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; diff --git a/bsp/coreip-e20-rtl/metal.h b/bsp/coreip-e20-rtl/metal.h index 66d4599..094cb45 100644 --- a/bsp/coreip-e20-rtl/metal.h +++ b/bsp/coreip-e20-rtl/metal.h @@ -5,9 +5,15 @@ #ifdef __METAL_MACHINE_MACROS +#ifndef __METAL_CLINT_NUM_PARENTS +#define __METAL_CLINT_NUM_PARENTS 0 +#endif #ifndef __METAL_PLIC_SUBINTERRUPTS #define __METAL_PLIC_SUBINTERRUPTS 0 #endif +#ifndef __METAL_PLIC_NUM_PARENTS +#define __METAL_PLIC_NUM_PARENTS 0 +#endif #define __METAL_CLIC_SUBINTERRUPTS 48 #ifndef __METAL_CLIC_SUBINTERRUPTS @@ -18,9 +24,13 @@ #define METAL_MAX_CLINT_INTERRUPTS 0 +#define __METAL_CLINT_NUM_PARENTS 0 + #define __METAL_PLIC_SUBINTERRUPTS 0 #define METAL_MAX_PLIC_INTERRUPTS 0 +#define __METAL_PLIC_NUM_PARENTS 0 + #define __METAL_INTERRUPT_CONTROLLER_2000000_INTERRUPTS 3 #define __METAL_CLIC_SUBINTERRUPTS 48 @@ -39,19 +49,22 @@ #include +#include #include #include #include #include #include +asm (".weak __metal_dt_mem_testram_20000000"); +struct metal_memory __metal_dt_mem_testram_20000000; + /* From cpu@0 */ asm (".weak __metal_dt_cpu_0"); struct __metal_driver_cpu __metal_dt_cpu_0; -/* From interrupt_controller */ -asm (".weak __metal_dt_interrupt_controller"); -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; +asm (".weak __metal_dt_cpu_0_interrupt_controller"); +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; /* From interrupt_controller@2000000 */ asm (".weak __metal_dt_interrupt_controller_2000000"); @@ -66,16 +79,27 @@ asm (".weak __metal_dt_teststatus_4000"); struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; +struct metal_memory __metal_dt_mem_testram_20000000 = { + ._base_address = 536870912UL, + ._size = 134217728UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + /* From cpu@0 */ struct __metal_driver_cpu __metal_dt_cpu_0 = { .vtable = &__metal_driver_vtable_cpu, .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, .timebase = 1000000UL, - .interrupt_controller = &__metal_dt_interrupt_controller.controller, + .interrupt_controller = &__metal_dt_cpu_0_interrupt_controller.controller, }; /* From interrupt_controller */ -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = { +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { .vtable = &__metal_driver_vtable_riscv_cpu_intc, .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, .init_done = 0, @@ -90,7 +114,7 @@ struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { .control_size = 16777216UL, .init_done = 0, .num_interrupts = METAL_MAX_CLIC_INTERRUPTS, - .interrupt_parent = &__metal_dt_interrupt_controller.controller, + .interrupt_parent = &__metal_dt_cpu_0_interrupt_controller.controller, .interrupt_lines[0] = 3, .interrupt_lines[1] = 7, .interrupt_lines[2] = 11, @@ -151,10 +175,11 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { }; -/* From cpu@0 */ -#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu) +#define __METAL_DT_MAX_MEMORIES 1 -#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu) +asm (".weak __metal_memory_table"); +struct metal_memory *__metal_memory_table[] = { + &__metal_dt_mem_testram_20000000}; #define __METAL_DT_MAX_HARTS 1 @@ -162,11 +187,6 @@ asm (".weak __metal_cpu_table"); struct __metal_driver_cpu *__metal_cpu_table[] = { &__metal_dt_cpu_0}; -/* From interrupt_controller */ -#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller) - -#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller) - /* From interrupt_controller@2000000 */ #define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) diff --git a/bsp/coreip-e20-rtl/metal.ramrodata.lds b/bsp/coreip-e20-rtl/metal.ramrodata.lds index 050f35f..4feb009 100644 --- a/bsp/coreip-e20-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e20-rtl/metal.ramrodata.lds @@ -19,6 +19,7 @@ PHDRS SECTIONS { __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; diff --git a/bsp/coreip-e20-rtl/metal.scratchpad.lds b/bsp/coreip-e20-rtl/metal.scratchpad.lds index 4900be7..73490a3 100644 --- a/bsp/coreip-e20-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e20-rtl/metal.scratchpad.lds @@ -19,6 +19,7 @@ PHDRS SECTIONS { __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; -- cgit v1.2.1-18-gbd029