From 983a630b07f08af869adc78cb37bf634389519af Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Thu, 7 Mar 2019 11:28:06 -0800 Subject: Rename coreip-X to coreip-X-rtl Signed-off-by: Nathaniel Graff --- bsp/coreip-e20/README.md | 6 -- bsp/coreip-e20/design.dts | 72 --------------- bsp/coreip-e20/metal.h | 209 ------------------------------------------ bsp/coreip-e20/metal.lds | 223 --------------------------------------------- bsp/coreip-e20/settings.mk | 6 -- 5 files changed, 516 deletions(-) delete mode 100644 bsp/coreip-e20/README.md delete mode 100644 bsp/coreip-e20/design.dts delete mode 100644 bsp/coreip-e20/metal.h delete mode 100644 bsp/coreip-e20/metal.lds delete mode 100644 bsp/coreip-e20/settings.mk (limited to 'bsp/coreip-e20') diff --git a/bsp/coreip-e20/README.md b/bsp/coreip-e20/README.md deleted file mode 100644 index f908327..0000000 --- a/bsp/coreip-e20/README.md +++ /dev/null @@ -1,6 +0,0 @@ -The SiFive E20 Standard Core is an extremely efficient implementation of the E2 Series configured for very low area and power. The E20 brings the power of the RISC-V software ecosystem to efficiently address traditional 8-bit and 32-bit microcontroller applications such as IoT, Analog Mixed Signal, and Programmable Finite State Machines. - -This core target is suitable with Verilog RTL for verification and running application software building on top of freedom-metal libraries. The target supports: - -- 1 hart with RV32IMC core -- 4 hardware breakpoints diff --git a/bsp/coreip-e20/design.dts b/bsp/coreip-e20/design.dts deleted file mode 100644 index d57c342..0000000 --- a/bsp/coreip-e20/design.dts +++ /dev/null @@ -1,72 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "SiFive,FE200G-dev", "fe200-dev", "sifive-dev"; - model = "SiFive,FE200G"; - L10: cpus { - #address-cells = <1>; - #size-cells = <0>; - L3: cpu@0 { - clock-frequency = <0>; - compatible = "sifive,caboose0", "riscv"; - device_type = "cpu"; - reg = <0x0>; - riscv,isa = "rv32imc"; - status = "okay"; - timebase-frequency = <1000000>; - hardware-exec-breakpoint-count = <4>; - L2: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - L9: soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "SiFive,FE200G-soc", "fe200-soc", "sifive-soc", "simple-bus"; - ranges; - L7: ahb-sys-port@20000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "sifive,ahb-sys-port", "sifive,ahb-port", "sifive,sys-port", "simple-bus"; - ranges = <0x20000000 0x20000000 0x20000000>; - }; - L1: debug-controller@0 { - compatible = "sifive,debug-013", "riscv,debug-013"; - interrupts-extended = <&L2 65535>; - reg = <0x0 0x1000>; - reg-names = "control"; - }; - L0: interrupt-controller@2000000 { - #interrupt-cells = <1>; - compatible = "sifive,clic0"; - interrupt-controller; - interrupts-extended = <&L2 3 &L2 7 &L2 11>; - reg = <0x2000000 0x1000000>; - reg-names = "control"; - sifive,numints = <48>; - sifive,numlevels = <16>; - sifive,numintbits = <2>; - }; - L6: local-external-interrupts-0 { - compatible = "sifive,local-external-interrupts0"; - interrupt-parent = <&L0>; - interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31>; - }; - L4: teststatus@4000 { - compatible = "sifive,test0"; - reg = <0x4000 0x1000>; - reg-names = "control"; - }; - test_memory: testram@20000000 { - compatible = "sifive,testram0"; - reg = <0x20000000 0x8000000>; - reg-names = "mem"; - word-size-bytes = <4>; - }; - }; -}; diff --git a/bsp/coreip-e20/metal.h b/bsp/coreip-e20/metal.h deleted file mode 100644 index f2441c6..0000000 --- a/bsp/coreip-e20/metal.h +++ /dev/null @@ -1,209 +0,0 @@ -#ifndef ASSEMBLY - -#ifndef COREIP_E20__METAL_H -#define COREIP_E20__METAL_H - -#ifdef __METAL_MACHINE_MACROS - -#define __METAL_CLIC_SUBINTERRUPTS 48 - -#ifndef __METAL_CLIC_SUBINTERRUPTS -#define __METAL_CLIC_SUBINTERRUPTS 0 -#endif - -#else /* ! __METAL_MACHINE_MACROS */ - -#define METAL_MAX_CLINT_INTERRUPTS 0 - -#define METAL_MAX_PLIC_INTERRUPTS 0 - -#define __METAL_INTERRUPT_CONTROLLER_2000000_INTERRUPTS 3 - -#define __METAL_CLIC_SUBINTERRUPTS 48 - -#define METAL_MAX_CLIC_INTERRUPTS 3 - -#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 32 - -#define METAL_MAX_LOCAL_EXT_INTERRUPTS 32 - -#define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 - -#define METAL_MAX_GPIO_INTERRUPTS 0 - -#define METAL_MAX_UART_INTERRUPTS 0 - - -#include -#include -#include -#include -#include -#include - -/* From cpu@0 */ -asm (".weak __metal_dt_cpu_0"); -struct __metal_driver_cpu __metal_dt_cpu_0; - -/* From interrupt_controller */ -asm (".weak __metal_dt_interrupt_controller"); -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; - -/* From interrupt_controller@2000000 */ -asm (".weak __metal_dt_interrupt_controller_2000000"); -struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000; - -/* From local_external_interrupts_0 */ -asm (".weak __metal_dt_local_external_interrupts_0"); -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; - -/* From teststatus@4000 */ -asm (".weak __metal_dt_teststatus_4000"); -struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; - - -/* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0 = { - .vtable = &__metal_driver_vtable_cpu, - .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, - .timebase = 1000000UL, - .interrupt_controller = &__metal_dt_interrupt_controller.controller, -}; - -/* From interrupt_controller */ -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = { - .vtable = &__metal_driver_vtable_riscv_cpu_intc, - .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, - .init_done = 0, - .interrupt_controller = 1, -}; - -/* From interrupt_controller@2000000 */ -struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { - .vtable = &__metal_driver_vtable_sifive_clic0, - .controller.vtable = &__metal_driver_vtable_sifive_clic0.clic_vtable, - .control_base = 33554432UL, - .control_size = 16777216UL, - .init_done = 0, - .num_interrupts = METAL_MAX_CLIC_INTERRUPTS, - .interrupt_parent = &__metal_dt_interrupt_controller.controller, - .interrupt_lines[0] = 3, - .interrupt_lines[1] = 7, - .interrupt_lines[2] = 11, - .num_subinterrupts = 48UL, - .num_intbits = 2UL, - .max_levels = 16UL, - .interrupt_controller = 1, -}; - -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { - .vtable = &__metal_driver_vtable_sifive_local_external_interrupts0, - .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, - .init_done = 0, -/* From interrupt_controller@2000000 */ - .interrupt_parent = &__metal_dt_interrupt_controller_2000000.controller, - .num_interrupts = METAL_MAX_LOCAL_EXT_INTERRUPTS, - .interrupt_lines[0] = 0, - .interrupt_lines[1] = 1, - .interrupt_lines[2] = 2, - .interrupt_lines[3] = 3, - .interrupt_lines[4] = 4, - .interrupt_lines[5] = 5, - .interrupt_lines[6] = 6, - .interrupt_lines[7] = 7, - .interrupt_lines[8] = 8, - .interrupt_lines[9] = 9, - .interrupt_lines[10] = 10, - .interrupt_lines[11] = 11, - .interrupt_lines[12] = 12, - .interrupt_lines[13] = 13, - .interrupt_lines[14] = 14, - .interrupt_lines[15] = 15, - .interrupt_lines[16] = 16, - .interrupt_lines[17] = 17, - .interrupt_lines[18] = 18, - .interrupt_lines[19] = 19, - .interrupt_lines[20] = 20, - .interrupt_lines[21] = 21, - .interrupt_lines[22] = 22, - .interrupt_lines[23] = 23, - .interrupt_lines[24] = 24, - .interrupt_lines[25] = 25, - .interrupt_lines[26] = 26, - .interrupt_lines[27] = 27, - .interrupt_lines[28] = 28, - .interrupt_lines[29] = 29, - .interrupt_lines[30] = 30, - .interrupt_lines[31] = 31, -}; - -/* From teststatus@4000 */ -struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { - .vtable = &__metal_driver_vtable_sifive_test0, - .shutdown.vtable = &__metal_driver_vtable_sifive_test0.shutdown, - .base = 16384UL, - .size = 4096UL, -}; - - -/* From cpu@0 */ -#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu) - -#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu) - -#define __METAL_DT_MAX_HARTS 1 - -asm (".weak __metal_cpu_table"); -struct __metal_driver_cpu *__metal_cpu_table[] = { - &__metal_dt_cpu_0}; - -/* From interrupt_controller */ -#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller) - -#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller) - -/* From interrupt_controller@2000000 */ -#define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) - -#define __METAL_DT_INTERRUPT_CONTROLLER_2000000_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) - -/* From local_external_interrupts_0 */ -#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __MEE_DT_MAX_GPIOS 0 - -asm (".weak __metal_gpio_table"); -struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { - NULL }; -#define __METAL_DT_MAX_BUTTONS 0 - -asm (".weak __metal_button_table"); -struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { - NULL }; -#define __METAL_DT_MAX_LEDS 0 - -asm (".weak __metal_led_table"); -struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { - NULL }; -#define __METAL_DT_MAX_SWITCHES 0 - -asm (".weak __metal_switch_table"); -struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { - NULL }; -#define __METAL_DT_MAX_SPIS 0 - -asm (".weak __metal_spi_table"); -struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { - NULL }; -/* From teststatus@4000 */ -#define __METAL_DT_SHUTDOWN_HANDLE (&__metal_dt_teststatus_4000.shutdown) - -#define __METAL_DT_TESTSTATUS_4000_HANDLE (&__metal_dt_teststatus_4000.shutdown) - - -#endif /* ! __METAL_MACHINE_MACROS */ -#endif /* COREIP_E20__METAL_H*/ -#endif /* ! ASSEMBLY */ diff --git a/bsp/coreip-e20/metal.lds b/bsp/coreip-e20/metal.lds deleted file mode 100644 index d98efc5..0000000 --- a/bsp/coreip-e20/metal.lds +++ /dev/null @@ -1,223 +0,0 @@ -OUTPUT_ARCH("riscv") - -ENTRY(_enter) - -MEMORY -{ - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x8000000 -} - -PHDRS -{ - flash PT_LOAD; - ram_init PT_LOAD; - itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; -} - -SECTIONS -{ - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; - __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - - - .init : - { - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - } >ram AT>ram :ram - - - .text : - { - *(.text.unlikely .text.unlikely.*) - *(.text.startup .text.startup.*) - *(.text .text.*) - *(.itim .itim.*) - *(.gnu.linkonce.t.*) - } >ram AT>ram :ram - - - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram - - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - - - .rodata : - { - *(.rdata) - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - } >ram AT>ram :ram - - - . = ALIGN(4); - - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram - - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram - - - .finit_array : - { - PROVIDE_HIDDEN (__finit_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram - - - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } >ram AT>ram :ram - - - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } >ram AT>ram :ram - - - .litimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram - - - .ditimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>ram :ram_init - - - .itim : - { - } >ram AT>ram :ram_init - - - . = ALIGN(8); - PROVIDE( metal_segment_itim_target_end = . ); - - - .lalign : - { - . = ALIGN(4); - PROVIDE( _data_lma = . ); - PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram - - - .dalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init - - - .data : - { - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.*) - *(.gnu.linkonce.s.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) - } >ram AT>ram :ram_init - - - . = ALIGN(4); - PROVIDE( _edata = . ); - PROVIDE( edata = . ); - PROVIDE( metal_segment_data_target_end = . ); - PROVIDE( _fbss = . ); - PROVIDE( __bss_start = . ); - PROVIDE( metal_segment_bss_target_start = . ); - - - .bss : - { - *(.sbss*) - *(.gnu.linkonce.sb.*) - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >ram AT>ram :ram - - - . = ALIGN(8); - PROVIDE( _end = . ); - PROVIDE( end = . ); - PROVIDE( metal_segment_bss_target_end = . ); - - - .stack : - { - PROVIDE(metal_segment_stack_begin = .); - . = __stack_size; - PROVIDE( _sp = . ); - PROVIDE(metal_segment_stack_end = .); - } >ram AT>ram :ram - - - .heap : - { - PROVIDE( metal_segment_heap_target_start = . ); - . = __heap_size; - PROVIDE( metal_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); - } >ram AT>ram :ram - - -} - diff --git a/bsp/coreip-e20/settings.mk b/bsp/coreip-e20/settings.mk deleted file mode 100644 index 1ac4d9f..0000000 --- a/bsp/coreip-e20/settings.mk +++ /dev/null @@ -1,6 +0,0 @@ -#write_config_file - -RISCV_ARCH=rv32imc -RISCV_ABI=ilp32 -RISCV_CMODEL=medlow -COREIP_MEM_WIDTH=32 -- cgit v1.2.3