From 12485f45ebb7f96dc60951bf4365533652ac5139 Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Thu, 23 May 2019 14:16:04 -0700
Subject: Update BSPs

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 bsp/coreip-e21-rtl/metal-inline.h       |  2 +-
 bsp/coreip-e21-rtl/metal-platform.h     |  2 +-
 bsp/coreip-e21-rtl/metal.default.lds    |  3 ++-
 bsp/coreip-e21-rtl/metal.h              | 10 +++++-----
 bsp/coreip-e21-rtl/metal.ramrodata.lds  |  3 ++-
 bsp/coreip-e21-rtl/metal.scratchpad.lds |  3 ++-
 bsp/coreip-e21-rtl/settings.mk          |  4 +++-
 7 files changed, 16 insertions(+), 11 deletions(-)

(limited to 'bsp/coreip-e21-rtl')

diff --git a/bsp/coreip-e21-rtl/metal-inline.h b/bsp/coreip-e21-rtl/metal-inline.h
index fc8a319..a7a7546 100644
--- a/bsp/coreip-e21-rtl/metal-inline.h
+++ b/bsp/coreip-e21-rtl/metal-inline.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
diff --git a/bsp/coreip-e21-rtl/metal-platform.h b/bsp/coreip-e21-rtl/metal-platform.h
index 51a7b22..dd03141 100644
--- a/bsp/coreip-e21-rtl/metal-platform.h
+++ b/bsp/coreip-e21-rtl/metal-platform.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 #ifndef COREIP_E21_RTL__METAL_PLATFORM_H
diff --git a/bsp/coreip-e21-rtl/metal.default.lds b/bsp/coreip-e21-rtl/metal.default.lds
index 0f4bf1e..4807dbc 100644
--- a/bsp/coreip-e21-rtl/metal.default.lds
+++ b/bsp/coreip-e21-rtl/metal.default.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e21-rtl/metal.h b/bsp/coreip-e21-rtl/metal.h
index eb1da58..78e3a7c 100644
--- a/bsp/coreip-e21-rtl/metal.h
+++ b/bsp/coreip-e21-rtl/metal.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
@@ -63,11 +63,11 @@
 
 #include <metal/drivers/fixed-clock.h>
 #include <metal/memory.h>
-#include <metal/drivers/riscv,cpu.h>
+#include <metal/drivers/riscv_cpu.h>
 #include <metal/pmp.h>
-#include <metal/drivers/sifive,clic0.h>
-#include <metal/drivers/sifive,local-external-interrupts0.h>
-#include <metal/drivers/sifive,test0.h>
+#include <metal/drivers/sifive_clic0.h>
+#include <metal/drivers/sifive_local-external-interrupts0.h>
+#include <metal/drivers/sifive_test0.h>
 
 struct metal_memory __metal_dt_mem_sys_sram_0_80000000;
 
diff --git a/bsp/coreip-e21-rtl/metal.ramrodata.lds b/bsp/coreip-e21-rtl/metal.ramrodata.lds
index b3b1581..556706d 100644
--- a/bsp/coreip-e21-rtl/metal.ramrodata.lds
+++ b/bsp/coreip-e21-rtl/metal.ramrodata.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e21-rtl/metal.scratchpad.lds b/bsp/coreip-e21-rtl/metal.scratchpad.lds
index 4b1b222..60a5bba 100644
--- a/bsp/coreip-e21-rtl/metal.scratchpad.lds
+++ b/bsp/coreip-e21-rtl/metal.scratchpad.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-05-55        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e21-rtl/settings.mk b/bsp/coreip-e21-rtl/settings.mk
index afc60e3..5ed3263 100644
--- a/bsp/coreip-e21-rtl/settings.mk
+++ b/bsp/coreip-e21-rtl/settings.mk
@@ -1,14 +1,16 @@
 # Copyright 2019 SiFive, Inc #
 # SPDX-License-Identifier: Apache-2.0 #
 # ----------------------------------- #
-# [XXXXX] 23-05-2019 13-29-49        #
+# [XXXXX] 28-05-2019 10-05-55        #
 # ----------------------------------- #
 
 RISCV_ARCH=rv32imac
 RISCV_ABI=ilp32
 RISCV_CMODEL=medlow
+RISCV_SERIES=sifive-2-series
 
 COREIP_MEM_WIDTH=32
 
 TARGET_TAGS=rtl
 TARGET_DHRY_ITERS=2000
+TARGET_CORE_ITERS=5
-- 
cgit v1.2.3