From 0fe5ca97956cc15effd0c459a81c8caacbc80ac3 Mon Sep 17 00:00:00 2001
From: Bunnaroath Sou <bsou@sifive.com>
Date: Mon, 18 Mar 2019 12:58:11 -0700
Subject: Update Arty clock to reflects HW
---
bsp/coreip-e24-rtl/metal.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
(limited to 'bsp/coreip-e24-rtl')
diff --git a/bsp/coreip-e24-rtl/metal.h b/bsp/coreip-e24-rtl/metal.h
index 23ed8d2..40f92c8 100644
--- a/bsp/coreip-e24-rtl/metal.h
+++ b/bsp/coreip-e24-rtl/metal.h
@@ -1,7 +1,7 @@
#ifndef ASSEMBLY
-#ifndef COREIP_E24__METAL_H
-#define COREIP_E24__METAL_H
+#ifndef COREIP_E24_RTL__METAL_H
+#define COREIP_E24_RTL__METAL_H
#ifdef __METAL_MACHINE_MACROS
@@ -311,5 +311,5 @@ struct __metal_driver_sifive_spi0 *__metal_spi_table[] = {
#endif /* ! __METAL_MACHINE_MACROS */
-#endif /* COREIP_E24__METAL_H*/
+#endif /* COREIP_E24_RTL__METAL_H*/
#endif /* ! ASSEMBLY */
--
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