From 02dc7f4f76e4f6c2cb31207b14f261fec49f98ce Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Wed, 3 Apr 2019 12:50:13 -0700 Subject: Update BSPs for Unleashed and U54(MC) Signed-off-by: Nathaniel Graff --- bsp/coreip-e31-rtl/metal.h | 95 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 74 insertions(+), 21 deletions(-) (limited to 'bsp/coreip-e31-rtl/metal.h') diff --git a/bsp/coreip-e31-rtl/metal.h b/bsp/coreip-e31-rtl/metal.h index 39be849..b842fff 100644 --- a/bsp/coreip-e31-rtl/metal.h +++ b/bsp/coreip-e31-rtl/metal.h @@ -5,11 +5,21 @@ #ifdef __METAL_MACHINE_MACROS +#define __METAL_CLINT_NUM_PARENTS 2 + +#ifndef __METAL_CLINT_NUM_PARENTS +#define __METAL_CLINT_NUM_PARENTS 0 +#endif #define __METAL_PLIC_SUBINTERRUPTS 128 +#define __METAL_PLIC_NUM_PARENTS 1 + #ifndef __METAL_PLIC_SUBINTERRUPTS #define __METAL_PLIC_SUBINTERRUPTS 0 #endif +#ifndef __METAL_PLIC_NUM_PARENTS +#define __METAL_PLIC_NUM_PARENTS 0 +#endif #ifndef __METAL_CLIC_SUBINTERRUPTS #define __METAL_CLIC_SUBINTERRUPTS 0 #endif @@ -20,12 +30,16 @@ #define METAL_MAX_CLINT_INTERRUPTS 2 +#define __METAL_CLINT_NUM_PARENTS 2 + #define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1 #define __METAL_PLIC_SUBINTERRUPTS 128 #define METAL_MAX_PLIC_INTERRUPTS 1 +#define __METAL_PLIC_NUM_PARENTS 1 + #define __METAL_CLIC_SUBINTERRUPTS 0 #define METAL_MAX_CLIC_INTERRUPTS 0 @@ -43,6 +57,7 @@ #include +#include #include #include #include @@ -51,6 +66,15 @@ #include #include +asm (".weak __metal_dt_mem_testram_20000000"); +struct metal_memory __metal_dt_mem_testram_20000000; + +asm (".weak __metal_dt_mem_dtim_80000000"); +struct metal_memory __metal_dt_mem_dtim_80000000; + +asm (".weak __metal_dt_mem_itim_8000000"); +struct metal_memory __metal_dt_mem_itim_8000000; + /* From clint@2000000 */ asm (".weak __metal_dt_clint_2000000"); struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; @@ -59,9 +83,8 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; asm (".weak __metal_dt_cpu_0"); struct __metal_driver_cpu __metal_dt_cpu_0; -/* From interrupt_controller */ -asm (".weak __metal_dt_interrupt_controller"); -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; +asm (".weak __metal_dt_cpu_0_interrupt_controller"); +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; /* From interrupt_controller@c000000 */ asm (".weak __metal_dt_interrupt_controller_c000000"); @@ -83,6 +106,39 @@ asm (".weak __metal_dt_teststatus_4000"); struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000; +struct metal_memory __metal_dt_mem_testram_20000000 = { + ._base_address = 536870912UL, + ._size = 134217728UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_dtim_80000000 = { + ._base_address = 2147483648UL, + ._size = 65536UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_itim_8000000 = { + ._base_address = 134217728UL, + ._size = 16384UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + /* From clint@2000000 */ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { .vtable = &__metal_driver_vtable_riscv_clint0, @@ -91,8 +147,9 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { .control_size = 65536UL, .init_done = 0, .num_interrupts = METAL_MAX_CLINT_INTERRUPTS, - .interrupt_parent = &__metal_dt_interrupt_controller.controller, + .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller, .interrupt_lines[0] = 3, + .interrupt_parents[1] = &__metal_dt_cpu_0_interrupt_controller.controller, .interrupt_lines[1] = 7, }; @@ -101,11 +158,11 @@ struct __metal_driver_cpu __metal_dt_cpu_0 = { .vtable = &__metal_driver_vtable_cpu, .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, .timebase = 1000000UL, - .interrupt_controller = &__metal_dt_interrupt_controller.controller, + .interrupt_controller = &__metal_dt_cpu_0_interrupt_controller.controller, }; /* From interrupt_controller */ -struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = { +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { .vtable = &__metal_driver_vtable_riscv_cpu_intc, .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, .init_done = 0, @@ -117,9 +174,8 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .vtable = &__metal_driver_vtable_riscv_plic0, .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable, .init_done = 0, -/* From interrupt_controller */ - .interrupt_parent = &__metal_dt_interrupt_controller.controller, - .interrupt_line = 11UL, + .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller, + .interrupt_lines[0] = 11, .control_base = 201326592UL, .control_size = 67108864UL, .max_priority = 7UL, @@ -137,8 +193,7 @@ struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_externa .vtable = &__metal_driver_vtable_sifive_local_external_interrupts0, .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, .init_done = 0, -/* From interrupt_controller */ - .interrupt_parent = &__metal_dt_interrupt_controller.controller, + .interrupt_parent = &__metal_dt_cpu_0_interrupt_controller.controller, .num_interrupts = METAL_MAX_LOCAL_EXT_INTERRUPTS, .interrupt_lines[0] = 16, .interrupt_lines[1] = 17, @@ -304,27 +359,25 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000 = { }; +#define __METAL_DT_MAX_MEMORIES 3 + +asm (".weak __metal_memory_table"); +struct metal_memory *__metal_memory_table[] = { + &__metal_dt_mem_testram_20000000, + &__metal_dt_mem_dtim_80000000, + &__metal_dt_mem_itim_8000000}; + /* From clint@2000000 */ #define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller) #define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller) -/* From cpu@0 */ -#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu) - -#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu) - #define __METAL_DT_MAX_HARTS 1 asm (".weak __metal_cpu_table"); struct __metal_driver_cpu *__metal_cpu_table[] = { &__metal_dt_cpu_0}; -/* From interrupt_controller */ -#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller) - -#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller) - /* From interrupt_controller@c000000 */ #define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) -- cgit v1.2.3