From b555941a3d06c31e03ecf51eef608c7356bdb3b9 Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Mon, 29 Apr 2019 14:50:24 -0700
Subject: Update BSPs for platform header

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 bsp/coreip-e34-rtl/metal-platform.h | 38 +++++++++++++++++++++++++++++++++++++
 bsp/coreip-e34-rtl/metal.h          | 16 +++++++++-------
 2 files changed, 47 insertions(+), 7 deletions(-)
 create mode 100644 bsp/coreip-e34-rtl/metal-platform.h

(limited to 'bsp/coreip-e34-rtl')

diff --git a/bsp/coreip-e34-rtl/metal-platform.h b/bsp/coreip-e34-rtl/metal-platform.h
new file mode 100644
index 0000000..9b9e13c
--- /dev/null
+++ b/bsp/coreip-e34-rtl/metal-platform.h
@@ -0,0 +1,38 @@
+#ifndef COREIP_E34_RTL__METAL_PLATFORM_H
+#define COREIP_E34_RTL__METAL_PLATFORM_H
+
+/* From clint@2000000 */
+#define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL
+#define METAL_RISCV_CLINT0_2000000_SIZE 65536UL
+
+#define METAL_RISCV_CLINT0
+#define METAL_RISCV_CLINT0_MSIP_BASE 0UL
+#define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL
+#define METAL_RISCV_CLINT0_MTIME 49144UL
+
+/* From interrupt_controller@c000000 */
+#define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL
+#define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL
+#define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL
+#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 128UL
+
+#define METAL_RISCV_PLIC0
+#define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL
+#define METAL_RISCV_PLIC0_PENDING_BASE 4096UL
+#define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL
+#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL
+#define METAL_RISCV_PLIC0_CLAIM 2097156UL
+
+/* From pmp@0 */
+#define METAL_RISCV_PMP_0_NUM_REGIONS 8UL
+
+#define METAL_RISCV_PMP
+
+/* From teststatus@4000 */
+#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL
+#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL
+
+#define METAL_SIFIVE_TEST0
+#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL
+
+#endif /* COREIP_E34_RTL__METAL_PLATFORM_H*/
diff --git a/bsp/coreip-e34-rtl/metal.h b/bsp/coreip-e34-rtl/metal.h
index 89e7f85..4039765 100644
--- a/bsp/coreip-e34-rtl/metal.h
+++ b/bsp/coreip-e34-rtl/metal.h
@@ -3,6 +3,8 @@
 #ifndef COREIP_E34_RTL__METAL_H
 #define COREIP_E34_RTL__METAL_H
 
+#include <metal/machine/platform.h>
+
 #ifdef __METAL_MACHINE_MACROS
 
 #define __METAL_CLINT_NUM_PARENTS 2
@@ -143,8 +145,8 @@ struct metal_memory __metal_dt_mem_itim_8000000 = {
 struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
     .vtable = &__metal_driver_vtable_riscv_clint0,
     .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable,
-    .control_base = 33554432UL,
-    .control_size = 65536UL,
+    .control_base = METAL_RISCV_CLINT0_2000000_BASE_ADDRESS,
+    .control_size = METAL_RISCV_CLINT0_2000000_SIZE,
     .init_done = 0,
     .num_interrupts = METAL_MAX_CLINT_INTERRUPTS,
     .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
@@ -176,16 +178,16 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
     .init_done = 0,
     .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
     .interrupt_lines[0] = 11,
-    .control_base = 201326592UL,
-    .control_size = 67108864UL,
-    .max_priority = 7UL,
-    .num_interrupts = 128UL,
+    .control_base = METAL_RISCV_PLIC0_C000000_BASE_ADDRESS,
+    .control_size = METAL_RISCV_PLIC0_C000000_SIZE,
+    .max_priority = METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY,
+    .num_interrupts = METAL_RISCV_PLIC0_C000000_RISCV_NDEV,
     .interrupt_controller = 1,
 };
 
 /* From pmp@0 */
 struct metal_pmp __metal_dt_pmp_0 = {
-    .num_regions = 8UL,
+    .num_regions = METAL_RISCV_PMP_0_NUM_REGIONS,
 };
 
 /* From local_external_interrupts_0 */
-- 
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