From b87018b8a5afa98a6f799527d9a4417290349a4a Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Tue, 21 May 2019 10:51:18 -0700 Subject: Modify BSP DTSs to use riscv,pmpregions property Signed-off-by: Nathaniel Graff --- bsp/coreip-e76-rtl/design.dts | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'bsp/coreip-e76-rtl') diff --git a/bsp/coreip-e76-rtl/design.dts b/bsp/coreip-e76-rtl/design.dts index 40c0004..25bd59c 100644 --- a/bsp/coreip-e76-rtl/design.dts +++ b/bsp/coreip-e76-rtl/design.dts @@ -21,6 +21,7 @@ next-level-cache = <&L9>; reg = <0x0>; riscv,isa = "rv32imafc"; + riscv,pmpregions = <8>; status = "okay"; timebase-frequency = <1000000>; hardware-exec-breakpoint-count = <4>; @@ -40,10 +41,6 @@ #size-cells = <1>; compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus"; ranges; - pmp: pmp@0 { - compatible = "riscv,pmp"; - regions = <8>; - }; L11: axi4-periph-port@20000000 { #address-cells = <1>; #size-cells = <1>; -- cgit v1.2.3