From 12485f45ebb7f96dc60951bf4365533652ac5139 Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Thu, 23 May 2019 14:16:04 -0700
Subject: Update BSPs

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 bsp/coreip-s76-rtl/metal-inline.h       |  2 +-
 bsp/coreip-s76-rtl/metal-platform.h     |  2 +-
 bsp/coreip-s76-rtl/metal.default.lds    |  3 ++-
 bsp/coreip-s76-rtl/metal.h              | 12 ++++++------
 bsp/coreip-s76-rtl/metal.ramrodata.lds  |  3 ++-
 bsp/coreip-s76-rtl/metal.scratchpad.lds |  3 ++-
 bsp/coreip-s76-rtl/settings.mk          |  4 +++-
 7 files changed, 17 insertions(+), 12 deletions(-)

(limited to 'bsp/coreip-s76-rtl')

diff --git a/bsp/coreip-s76-rtl/metal-inline.h b/bsp/coreip-s76-rtl/metal-inline.h
index 57d7a4d..207deee 100644
--- a/bsp/coreip-s76-rtl/metal-inline.h
+++ b/bsp/coreip-s76-rtl/metal-inline.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
diff --git a/bsp/coreip-s76-rtl/metal-platform.h b/bsp/coreip-s76-rtl/metal-platform.h
index ca0320d..ca65c36 100644
--- a/bsp/coreip-s76-rtl/metal-platform.h
+++ b/bsp/coreip-s76-rtl/metal-platform.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 #ifndef COREIP_S76_RTL__METAL_PLATFORM_H
diff --git a/bsp/coreip-s76-rtl/metal.default.lds b/bsp/coreip-s76-rtl/metal.default.lds
index f1317d6..85640c7 100644
--- a/bsp/coreip-s76-rtl/metal.default.lds
+++ b/bsp/coreip-s76-rtl/metal.default.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 1);
 
 
 	.init 		:
diff --git a/bsp/coreip-s76-rtl/metal.h b/bsp/coreip-s76-rtl/metal.h
index 7b092fc..0da0815 100644
--- a/bsp/coreip-s76-rtl/metal.h
+++ b/bsp/coreip-s76-rtl/metal.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
@@ -69,12 +69,12 @@
 
 #include <metal/drivers/fixed-clock.h>
 #include <metal/memory.h>
-#include <metal/drivers/riscv,clint0.h>
-#include <metal/drivers/riscv,cpu.h>
-#include <metal/drivers/riscv,plic0.h>
+#include <metal/drivers/riscv_clint0.h>
+#include <metal/drivers/riscv_cpu.h>
+#include <metal/drivers/riscv_plic0.h>
 #include <metal/pmp.h>
-#include <metal/drivers/sifive,global-external-interrupts0.h>
-#include <metal/drivers/sifive,test0.h>
+#include <metal/drivers/sifive_global-external-interrupts0.h>
+#include <metal/drivers/sifive_test0.h>
 
 struct metal_memory __metal_dt_mem_memory_80000000;
 
diff --git a/bsp/coreip-s76-rtl/metal.ramrodata.lds b/bsp/coreip-s76-rtl/metal.ramrodata.lds
index 11169de..f989496 100644
--- a/bsp/coreip-s76-rtl/metal.ramrodata.lds
+++ b/bsp/coreip-s76-rtl/metal.ramrodata.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 1);
 
 
 	.init 		:
diff --git a/bsp/coreip-s76-rtl/metal.scratchpad.lds b/bsp/coreip-s76-rtl/metal.scratchpad.lds
index f1317d6..85640c7 100644
--- a/bsp/coreip-s76-rtl/metal.scratchpad.lds
+++ b/bsp/coreip-s76-rtl/metal.scratchpad.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49        */
+/* [XXXXX] 28-05-2019 10-06-10        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -28,6 +28,7 @@ SECTIONS
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 	PROVIDE(__metal_boot_hart = 0);
+	PROVIDE(__metal_chicken_bit = 1);
 
 
 	.init 		:
diff --git a/bsp/coreip-s76-rtl/settings.mk b/bsp/coreip-s76-rtl/settings.mk
index a25dc18..46377af 100644
--- a/bsp/coreip-s76-rtl/settings.mk
+++ b/bsp/coreip-s76-rtl/settings.mk
@@ -1,14 +1,16 @@
 # Copyright 2019 SiFive, Inc #
 # SPDX-License-Identifier: Apache-2.0 #
 # ----------------------------------- #
-# [XXXXX] 23-05-2019 13-29-49        #
+# [XXXXX] 28-05-2019 10-06-10        #
 # ----------------------------------- #
 
 RISCV_ARCH=rv64imafdc
 RISCV_ABI=lp64d
 RISCV_CMODEL=medany
+RISCV_SERIES=sifive-7-series
 
 COREIP_MEM_WIDTH=64
 
 TARGET_TAGS=rtl
 TARGET_DHRY_ITERS=2000
+TARGET_CORE_ITERS=5
-- 
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