From f695df295da82c8ef801906ad8b00b0e8afa7502 Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Thu, 7 Mar 2019 09:27:31 -0800 Subject: Remove legacy BSP Signed-off-by: Nathaniel Graff --- bsp/include/sifive/bits.h | 36 ---------------- bsp/include/sifive/const.h | 18 -------- bsp/include/sifive/devices/aon.h | 88 -------------------------------------- bsp/include/sifive/devices/clic.h | 30 ------------- bsp/include/sifive/devices/clint.h | 14 ------ bsp/include/sifive/devices/gpio.h | 24 ----------- bsp/include/sifive/devices/otp.h | 23 ---------- bsp/include/sifive/devices/plic.h | 31 -------------- bsp/include/sifive/devices/prci.h | 56 ------------------------ bsp/include/sifive/devices/pwm.h | 37 ---------------- bsp/include/sifive/devices/spi.h | 80 ---------------------------------- bsp/include/sifive/devices/uart.h | 27 ------------ bsp/include/sifive/sections.h | 17 -------- bsp/include/sifive/smp.h | 65 ---------------------------- 14 files changed, 546 deletions(-) delete mode 100644 bsp/include/sifive/bits.h delete mode 100644 bsp/include/sifive/const.h delete mode 100644 bsp/include/sifive/devices/aon.h delete mode 100644 bsp/include/sifive/devices/clic.h delete mode 100644 bsp/include/sifive/devices/clint.h delete mode 100644 bsp/include/sifive/devices/gpio.h delete mode 100644 bsp/include/sifive/devices/otp.h delete mode 100644 bsp/include/sifive/devices/plic.h delete mode 100644 bsp/include/sifive/devices/prci.h delete mode 100644 bsp/include/sifive/devices/pwm.h delete mode 100644 bsp/include/sifive/devices/spi.h delete mode 100644 bsp/include/sifive/devices/uart.h delete mode 100644 bsp/include/sifive/sections.h delete mode 100644 bsp/include/sifive/smp.h (limited to 'bsp/include/sifive') diff --git a/bsp/include/sifive/bits.h b/bsp/include/sifive/bits.h deleted file mode 100644 index bfe656f..0000000 --- a/bsp/include/sifive/bits.h +++ /dev/null @@ -1,36 +0,0 @@ -// See LICENSE for license details. -#ifndef _RISCV_BITS_H -#define _RISCV_BITS_H - -#define likely(x) __builtin_expect((x), 1) -#define unlikely(x) __builtin_expect((x), 0) - -#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b)) -#define ROUNDDOWN(a, b) ((a)/(b)*(b)) - -#define MAX(a, b) ((a) > (b) ? (a) : (b)) -#define MIN(a, b) ((a) < (b) ? (a) : (b)) -#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi) - -#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1))) -#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1)))) - -#define STR(x) XSTR(x) -#define XSTR(x) #x - -#if __riscv_xlen == 64 -# define SLL32 sllw -# define STORE sd -# define LOAD ld -# define LWU lwu -# define LOG_REGBYTES 3 -#else -# define SLL32 sll -# define STORE sw -# define LOAD lw -# define LWU lw -# define LOG_REGBYTES 2 -#endif -#define REGBYTES (1 << LOG_REGBYTES) - -#endif diff --git a/bsp/include/sifive/const.h b/bsp/include/sifive/const.h deleted file mode 100644 index 8dcffbb..0000000 --- a/bsp/include/sifive/const.h +++ /dev/null @@ -1,18 +0,0 @@ -// See LICENSE for license details. -/* Derived from */ - -#ifndef _SIFIVE_CONST_H -#define _SIFIVE_CONST_H - -#ifdef __ASSEMBLER__ -#define _AC(X,Y) X -#define _AT(T,X) X -#else -#define _AC(X,Y) (X##Y) -#define _AT(T,X) ((T)(X)) -#endif /* !__ASSEMBLER__*/ - -#define _BITUL(x) (_AC(1,UL) << (x)) -#define _BITULL(x) (_AC(1,ULL) << (x)) - -#endif /* _SIFIVE_CONST_H */ diff --git a/bsp/include/sifive/devices/aon.h b/bsp/include/sifive/devices/aon.h deleted file mode 100644 index 63f1db3..0000000 --- a/bsp/include/sifive/devices/aon.h +++ /dev/null @@ -1,88 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_AON_H -#define _SIFIVE_AON_H - -/* Register offsets */ - -#define AON_WDOGCFG 0x000 -#define AON_WDOGCOUNT 0x008 -#define AON_WDOGS 0x010 -#define AON_WDOGFEED 0x018 -#define AON_WDOGKEY 0x01C -#define AON_WDOGCMP 0x020 - -#define AON_RTCCFG 0x040 -#define AON_RTCLO 0x048 -#define AON_RTCHI 0x04C -#define AON_RTCS 0x050 -#define AON_RTCCMP 0x060 - -#define AON_BACKUP0 0x080 -#define AON_BACKUP1 0x084 -#define AON_BACKUP2 0x088 -#define AON_BACKUP3 0x08C -#define AON_BACKUP4 0x090 -#define AON_BACKUP5 0x094 -#define AON_BACKUP6 0x098 -#define AON_BACKUP7 0x09C -#define AON_BACKUP8 0x0A0 -#define AON_BACKUP9 0x0A4 -#define AON_BACKUP10 0x0A8 -#define AON_BACKUP11 0x0AC -#define AON_BACKUP12 0x0B0 -#define AON_BACKUP13 0x0B4 -#define AON_BACKUP14 0x0B8 -#define AON_BACKUP15 0x0BC - -#define AON_PMUWAKEUPI0 0x100 -#define AON_PMUWAKEUPI1 0x104 -#define AON_PMUWAKEUPI2 0x108 -#define AON_PMUWAKEUPI3 0x10C -#define AON_PMUWAKEUPI4 0x110 -#define AON_PMUWAKEUPI5 0x114 -#define AON_PMUWAKEUPI6 0x118 -#define AON_PMUWAKEUPI7 0x11C -#define AON_PMUSLEEPI0 0x120 -#define AON_PMUSLEEPI1 0x124 -#define AON_PMUSLEEPI2 0x128 -#define AON_PMUSLEEPI3 0x12C -#define AON_PMUSLEEPI4 0x130 -#define AON_PMUSLEEPI5 0x134 -#define AON_PMUSLEEPI6 0x138 -#define AON_PMUSLEEPI7 0x13C -#define AON_PMUIE 0x140 -#define AON_PMUCAUSE 0x144 -#define AON_PMUSLEEP 0x148 -#define AON_PMUKEY 0x14C - -#define AON_LFROSC 0x070 -/* Constants */ - -#define AON_WDOGKEY_VALUE 0x51F15E -#define AON_WDOGFEED_VALUE 0xD09F00D - -#define AON_WDOGCFG_SCALE 0x0000000F -#define AON_WDOGCFG_RSTEN 0x00000100 -#define AON_WDOGCFG_ZEROCMP 0x00000200 -#define AON_WDOGCFG_ENALWAYS 0x00001000 -#define AON_WDOGCFG_ENCOREAWAKE 0x00002000 -#define AON_WDOGCFG_CMPIP 0x10000000 - -#define AON_RTCCFG_SCALE 0x0000000F -#define AON_RTCCFG_ENALWAYS 0x00001000 -#define AON_RTCCFG_CMPIP 0x10000000 - -#define AON_WAKEUPCAUSE_RESET 0x00 -#define AON_WAKEUPCAUSE_RTC 0x01 -#define AON_WAKEUPCAUSE_DWAKEUP 0x02 -#define AON_WAKEUPCAUSE_AWAKEUP 0x03 - -#define AON_RESETCAUSE_POWERON 0x0000 -#define AON_RESETCAUSE_EXTERNAL 0x0100 -#define AON_RESETCAUSE_WATCHDOG 0x0200 - -#define AON_PMUCAUSE_WAKEUPCAUSE 0x00FF -#define AON_PMUCAUSE_RESETCAUSE 0xFF00 - -#endif /* _SIFIVE_AON_H */ diff --git a/bsp/include/sifive/devices/clic.h b/bsp/include/sifive/devices/clic.h deleted file mode 100644 index e8dc2df..0000000 --- a/bsp/include/sifive/devices/clic.h +++ /dev/null @@ -1,30 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_CLIC_H -#define _SIFIVE_CLIC_H - -#define CLIC_HART0 0x00800000 -#define CLIC_MSIP 0x0000 -#define CLIC_MSIP_size 0x4 -#define CLIC_MTIMECMP 0x4000 -#define CLIC_MTIMECMP_size 0x8 -#define CLIC_MTIME 0xBFF8 -#define CLIC_MTIME_size 0x8 - -#define CLIC_INTIP 0x000 -#define CLIC_INTIE 0x400 -#define CLIC_INTCFG 0x800 -#define CLIC_CFG 0xc00 - -// These interrupt IDs are consistent across old and new mtvec modes -#define SSIPID 1 -#define MSIPID 3 -#define STIPID 5 -#define MTIPID 7 -#define SEIPID 9 -#define MEIPID 11 -#define CSIPID 12 -#define LOCALINTIDBASE 16 - - -#endif /* _SIFIVE_CLIC_H */ diff --git a/bsp/include/sifive/devices/clint.h b/bsp/include/sifive/devices/clint.h deleted file mode 100644 index cd3e0c7..0000000 --- a/bsp/include/sifive/devices/clint.h +++ /dev/null @@ -1,14 +0,0 @@ -// See LICENSE for license details - -#ifndef _SIFIVE_CLINT_H -#define _SIFIVE_CLINT_H - - -#define CLINT_MSIP 0x0000 -#define CLINT_MSIP_size 0x4 -#define CLINT_MTIMECMP 0x4000 -#define CLINT_MTIMECMP_size 0x8 -#define CLINT_MTIME 0xBFF8 -#define CLINT_MTIME_size 0x8 - -#endif /* _SIFIVE_CLINT_H */ diff --git a/bsp/include/sifive/devices/gpio.h b/bsp/include/sifive/devices/gpio.h deleted file mode 100644 index f7f0acb..0000000 --- a/bsp/include/sifive/devices/gpio.h +++ /dev/null @@ -1,24 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_GPIO_H -#define _SIFIVE_GPIO_H - -#define GPIO_INPUT_VAL (0x00) -#define GPIO_INPUT_EN (0x04) -#define GPIO_OUTPUT_EN (0x08) -#define GPIO_OUTPUT_VAL (0x0C) -#define GPIO_PULLUP_EN (0x10) -#define GPIO_DRIVE (0x14) -#define GPIO_RISE_IE (0x18) -#define GPIO_RISE_IP (0x1C) -#define GPIO_FALL_IE (0x20) -#define GPIO_FALL_IP (0x24) -#define GPIO_HIGH_IE (0x28) -#define GPIO_HIGH_IP (0x2C) -#define GPIO_LOW_IE (0x30) -#define GPIO_LOW_IP (0x34) -#define GPIO_IOF_EN (0x38) -#define GPIO_IOF_SEL (0x3C) -#define GPIO_OUTPUT_XOR (0x40) - -#endif /* _SIFIVE_GPIO_H */ diff --git a/bsp/include/sifive/devices/otp.h b/bsp/include/sifive/devices/otp.h deleted file mode 100644 index 93833e2..0000000 --- a/bsp/include/sifive/devices/otp.h +++ /dev/null @@ -1,23 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_OTP_H -#define _SIFIVE_OTP_H - -/* Register offsets */ - -#define OTP_LOCK 0x00 -#define OTP_CK 0x04 -#define OTP_OE 0x08 -#define OTP_SEL 0x0C -#define OTP_WE 0x10 -#define OTP_MR 0x14 -#define OTP_MRR 0x18 -#define OTP_MPP 0x1C -#define OTP_VRREN 0x20 -#define OTP_VPPEN 0x24 -#define OTP_A 0x28 -#define OTP_D 0x2C -#define OTP_Q 0x30 -#define OTP_READ_TIMINGS 0x34 - -#endif diff --git a/bsp/include/sifive/devices/plic.h b/bsp/include/sifive/devices/plic.h deleted file mode 100644 index e1ca5d6..0000000 --- a/bsp/include/sifive/devices/plic.h +++ /dev/null @@ -1,31 +0,0 @@ -// See LICENSE for license details. - -#ifndef PLIC_H -#define PLIC_H - -#include - -// 32 bits per source -#define PLIC_PRIORITY_OFFSET _AC(0x0000,UL) -#define PLIC_PRIORITY_SHIFT_PER_SOURCE 2 -// 1 bit per source (1 address) -#define PLIC_PENDING_OFFSET _AC(0x1000,UL) -#define PLIC_PENDING_SHIFT_PER_SOURCE 0 - -//0x80 per target -#define PLIC_ENABLE_OFFSET _AC(0x2000,UL) -#define PLIC_ENABLE_SHIFT_PER_TARGET 7 - - -#define PLIC_THRESHOLD_OFFSET _AC(0x200000,UL) -#define PLIC_CLAIM_OFFSET _AC(0x200004,UL) -#define PLIC_THRESHOLD_SHIFT_PER_TARGET 12 -#define PLIC_CLAIM_SHIFT_PER_TARGET 12 - -#define PLIC_MAX_SOURCE 1023 -#define PLIC_SOURCE_MASK 0x3FF - -#define PLIC_MAX_TARGET 15871 -#define PLIC_TARGET_MASK 0x3FFF - -#endif /* PLIC_H */ diff --git a/bsp/include/sifive/devices/prci.h b/bsp/include/sifive/devices/prci.h deleted file mode 100644 index 1a3de58..0000000 --- a/bsp/include/sifive/devices/prci.h +++ /dev/null @@ -1,56 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_PRCI_H -#define _SIFIVE_PRCI_H - -/* Register offsets */ - -#define PRCI_HFROSCCFG (0x0000) -#define PRCI_HFXOSCCFG (0x0004) -#define PRCI_PLLCFG (0x0008) -#define PRCI_PLLDIV (0x000C) -#define PRCI_PROCMONCFG (0x00F0) - -/* Fields */ -#define ROSC_DIV(x) (((x) & 0x2F) << 0 ) -#define ROSC_TRIM(x) (((x) & 0x1F) << 16) -#define ROSC_EN(x) (((x) & 0x1 ) << 30) -#define ROSC_RDY(x) (((x) & 0x1 ) << 31) - -#define XOSC_EN(x) (((x) & 0x1) << 30) -#define XOSC_RDY(x) (((x) & 0x1) << 31) - -#define PLL_R(x) (((x) & 0x7) << 0) -// single reserved bit for F LSB. -#define PLL_F(x) (((x) & 0x3F) << 4) -#define PLL_Q(x) (((x) & 0x3) << 10) -#define PLL_SEL(x) (((x) & 0x1) << 16) -#define PLL_REFSEL(x) (((x) & 0x1) << 17) -#define PLL_BYPASS(x) (((x) & 0x1) << 18) -#define PLL_LOCK(x) (((x) & 0x1) << 31) - -#define PLL_R_default 0x1 -#define PLL_F_default 0x1F -#define PLL_Q_default 0x3 - -#define PLL_REFSEL_HFROSC 0x0 -#define PLL_REFSEL_HFXOSC 0x1 - -#define PLL_SEL_HFROSC 0x0 -#define PLL_SEL_PLL 0x1 - -#define PLL_FINAL_DIV(x) (((x) & 0x3F) << 0) -#define PLL_FINAL_DIV_BY_1(x) (((x) & 0x1 ) << 8) - -#define PROCMON_DIV(x) (((x) & 0x1F) << 0) -#define PROCMON_TRIM(x) (((x) & 0x1F) << 8) -#define PROCMON_EN(x) (((x) & 0x1) << 16) -#define PROCMON_SEL(x) (((x) & 0x3) << 24) -#define PROCMON_NT_EN(x) (((x) & 0x1) << 28) - -#define PROCMON_SEL_HFCLK 0 -#define PROCMON_SEL_HFXOSCIN 1 -#define PROCMON_SEL_PLLOUTDIV 2 -#define PROCMON_SEL_PROCMON 3 - -#endif // _SIFIVE_PRCI_H diff --git a/bsp/include/sifive/devices/pwm.h b/bsp/include/sifive/devices/pwm.h deleted file mode 100644 index 067889a..0000000 --- a/bsp/include/sifive/devices/pwm.h +++ /dev/null @@ -1,37 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_PWM_H -#define _SIFIVE_PWM_H - -/* Register offsets */ - -#define PWM_CFG 0x00 -#define PWM_COUNT 0x08 -#define PWM_S 0x10 -#define PWM_CMP0 0x20 -#define PWM_CMP1 0x24 -#define PWM_CMP2 0x28 -#define PWM_CMP3 0x2C - -/* Constants */ - -#define PWM_CFG_SCALE 0x0000000F -#define PWM_CFG_STICKY 0x00000100 -#define PWM_CFG_ZEROCMP 0x00000200 -#define PWM_CFG_DEGLITCH 0x00000400 -#define PWM_CFG_ENALWAYS 0x00001000 -#define PWM_CFG_ONESHOT 0x00002000 -#define PWM_CFG_CMP0CENTER 0x00010000 -#define PWM_CFG_CMP1CENTER 0x00020000 -#define PWM_CFG_CMP2CENTER 0x00040000 -#define PWM_CFG_CMP3CENTER 0x00080000 -#define PWM_CFG_CMP0GANG 0x01000000 -#define PWM_CFG_CMP1GANG 0x02000000 -#define PWM_CFG_CMP2GANG 0x04000000 -#define PWM_CFG_CMP3GANG 0x08000000 -#define PWM_CFG_CMP0IP 0x10000000 -#define PWM_CFG_CMP1IP 0x20000000 -#define PWM_CFG_CMP2IP 0x40000000 -#define PWM_CFG_CMP3IP 0x80000000 - -#endif /* _SIFIVE_PWM_H */ diff --git a/bsp/include/sifive/devices/spi.h b/bsp/include/sifive/devices/spi.h deleted file mode 100644 index 80ef345..0000000 --- a/bsp/include/sifive/devices/spi.h +++ /dev/null @@ -1,80 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_SPI_H -#define _SIFIVE_SPI_H - -/* Register offsets */ - -#define SPI_REG_SCKDIV 0x00 -#define SPI_REG_SCKMODE 0x04 -#define SPI_REG_CSID 0x10 -#define SPI_REG_CSDEF 0x14 -#define SPI_REG_CSMODE 0x18 - -#define SPI_REG_DCSSCK 0x28 -#define SPI_REG_DSCKCS 0x2a -#define SPI_REG_DINTERCS 0x2c -#define SPI_REG_DINTERXFR 0x2e - -#define SPI_REG_FMT 0x40 -#define SPI_REG_TXFIFO 0x48 -#define SPI_REG_RXFIFO 0x4c -#define SPI_REG_TXCTRL 0x50 -#define SPI_REG_RXCTRL 0x54 - -#define SPI_REG_FCTRL 0x60 -#define SPI_REG_FFMT 0x64 - -#define SPI_REG_IE 0x70 -#define SPI_REG_IP 0x74 - -/* Fields */ - -#define SPI_SCK_PHA 0x1 -#define SPI_SCK_POL 0x2 - -#define SPI_FMT_PROTO(x) ((x) & 0x3) -#define SPI_FMT_ENDIAN(x) (((x) & 0x1) << 2) -#define SPI_FMT_DIR(x) (((x) & 0x1) << 3) -#define SPI_FMT_LEN(x) (((x) & 0xf) << 16) - -/* TXCTRL register */ -#define SPI_TXWM(x) ((x) & 0xffff) -/* RXCTRL register */ -#define SPI_RXWM(x) ((x) & 0xffff) - -#define SPI_IP_TXWM 0x1 -#define SPI_IP_RXWM 0x2 - -#define SPI_FCTRL_EN 0x1 - -#define SPI_INSN_CMD_EN 0x1 -#define SPI_INSN_ADDR_LEN(x) (((x) & 0x7) << 1) -#define SPI_INSN_PAD_CNT(x) (((x) & 0xf) << 4) -#define SPI_INSN_CMD_PROTO(x) (((x) & 0x3) << 8) -#define SPI_INSN_ADDR_PROTO(x) (((x) & 0x3) << 10) -#define SPI_INSN_DATA_PROTO(x) (((x) & 0x3) << 12) -#define SPI_INSN_CMD_CODE(x) (((x) & 0xff) << 16) -#define SPI_INSN_PAD_CODE(x) (((x) & 0xff) << 24) - -#define SPI_TXFIFO_FULL (1 << 31) -#define SPI_RXFIFO_EMPTY (1 << 31) - -/* Values */ - -#define SPI_CSMODE_AUTO 0 -#define SPI_CSMODE_HOLD 2 -#define SPI_CSMODE_OFF 3 - -#define SPI_DIR_RX 0 -#define SPI_DIR_TX 1 - -#define SPI_PROTO_S 0 -#define SPI_PROTO_D 1 -#define SPI_PROTO_Q 2 - -#define SPI_ENDIAN_MSB 0 -#define SPI_ENDIAN_LSB 1 - - -#endif /* _SIFIVE_SPI_H */ diff --git a/bsp/include/sifive/devices/uart.h b/bsp/include/sifive/devices/uart.h deleted file mode 100644 index 71bea6f..0000000 --- a/bsp/include/sifive/devices/uart.h +++ /dev/null @@ -1,27 +0,0 @@ -// See LICENSE for license details. - -#ifndef _SIFIVE_UART_H -#define _SIFIVE_UART_H - -/* Register offsets */ -#define UART_REG_TXFIFO 0x00 -#define UART_REG_RXFIFO 0x04 -#define UART_REG_TXCTRL 0x08 -#define UART_REG_RXCTRL 0x0c -#define UART_REG_IE 0x10 -#define UART_REG_IP 0x14 -#define UART_REG_DIV 0x18 - -/* TXCTRL register */ -#define UART_TXEN 0x1 -#define UART_TXWM(x) (((x) & 0xffff) << 16) - -/* RXCTRL register */ -#define UART_RXEN 0x1 -#define UART_RXWM(x) (((x) & 0xffff) << 16) - -/* IP register */ -#define UART_IP_TXWM 0x1 -#define UART_IP_RXWM 0x2 - -#endif /* _SIFIVE_UART_H */ diff --git a/bsp/include/sifive/sections.h b/bsp/include/sifive/sections.h deleted file mode 100644 index 6e1f051..0000000 --- a/bsp/include/sifive/sections.h +++ /dev/null @@ -1,17 +0,0 @@ -// See LICENSE for license details. -#ifndef _SECTIONS_H -#define _SECTIONS_H - -extern unsigned char _rom[]; -extern unsigned char _rom_end[]; - -extern unsigned char _ram[]; -extern unsigned char _ram_end[]; - -extern unsigned char _ftext[]; -extern unsigned char _etext[]; -extern unsigned char _fbss[]; -extern unsigned char _ebss[]; -extern unsigned char _end[]; - -#endif /* _SECTIONS_H */ diff --git a/bsp/include/sifive/smp.h b/bsp/include/sifive/smp.h deleted file mode 100644 index 8e34388..0000000 --- a/bsp/include/sifive/smp.h +++ /dev/null @@ -1,65 +0,0 @@ -#ifndef SIFIVE_SMP -#define SIFIVE_SMP - -// The maximum number of HARTs this code supports -#ifndef MAX_HARTS -#define MAX_HARTS 32 -#endif -#define CLINT_END_HART_IPI CLINT_CTRL_ADDR + (MAX_HARTS*4) - -// The hart that non-SMP tests should run on -#ifndef NONSMP_HART -#define NONSMP_HART 0 -#endif - -/* If your test cannot handle multiple-threads, use this: - * smp_disable(reg1) - */ -#define smp_disable(reg1, reg2) \ - csrr reg1, mhartid ;\ - li reg2, NONSMP_HART ;\ - beq reg1, reg2, hart0_entry ;\ -42: ;\ - wfi ;\ - j 42b ;\ -hart0_entry: - -/* If your test needs to temporarily block multiple-threads, do this: - * smp_pause(reg1, reg2) - * ... single-threaded work ... - * smp_resume(reg1, reg2) - * ... multi-threaded work ... - */ - -#define smp_pause(reg1, reg2) \ - li reg2, 0x8 ;\ - csrw mie, reg2 ;\ - csrr reg2, mhartid ;\ - bnez reg2, 42f - -#define smp_resume(reg1, reg2) \ - li reg1, CLINT_CTRL_ADDR ;\ -41: ;\ - li reg2, 1 ;\ - sw reg2, 0(reg1) ;\ - addi reg1, reg1, 4 ;\ - li reg2, CLINT_END_HART_IPI ;\ - blt reg1, reg2, 41b ;\ -42: ;\ - wfi ;\ - csrr reg2, mip ;\ - andi reg2, reg2, 0x8 ;\ - beqz reg2, 42b ;\ - li reg1, CLINT_CTRL_ADDR ;\ - csrr reg2, mhartid ;\ - slli reg2, reg2, 2 ;\ - add reg2, reg2, reg1 ;\ - sw zero, 0(reg2) ;\ -41: ;\ - lw reg2, 0(reg1) ;\ - bnez reg2, 41b ;\ - addi reg1, reg1, 4 ;\ - li reg2, CLINT_END_HART_IPI ;\ - blt reg1, reg2, 41b - -#endif -- cgit v1.2.3