From b87018b8a5afa98a6f799527d9a4417290349a4a Mon Sep 17 00:00:00 2001
From: Nathaniel Graff <nathaniel.graff@sifive.com>
Date: Tue, 21 May 2019 10:51:18 -0700
Subject: Modify BSP DTSs to use riscv,pmpregions property

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
---
 bsp/sifive-hifive1-revb/design.dts | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

(limited to 'bsp/sifive-hifive1-revb')

diff --git a/bsp/sifive-hifive1-revb/design.dts b/bsp/sifive-hifive1-revb/design.dts
index 0e48622..970d3be 100644
--- a/bsp/sifive-hifive1-revb/design.dts
+++ b/bsp/sifive-hifive1-revb/design.dts
@@ -25,6 +25,7 @@
                         next-level-cache = <&spi0>;
                         reg = <0>;
                         riscv,isa = "rv32imac";
+                        riscv,pmpregions = <8>;
                         sifive,dtim = <&dtim>;
                         status = "okay";
                         timebase-frequency = <1000000>;
@@ -43,12 +44,6 @@
                 #clock-cells = <1>;
                 compatible = "sifive,hifive1";
                 ranges;
-
-		pmp: pmp@0 {
-			compatible = "riscv,pmp";
-			regions = <8>;
-		};
-
                 hfxoscin: clock@0 {
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
-- 
cgit v1.2.1-18-gbd029