From 64115be98dda5eae8840e373c85b0c615f196dbb Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Tue, 25 Jul 2017 16:58:47 -0500
Subject: added vectored interrupt example

---
 bsp/env/coreplexip-e31-arty/init.c     |  13 +-
 bsp/env/coreplexip-e31-arty/platform.h |   5 +
 bsp/env/ventry.S                       | 319 +++++++++++++++++++++++++++++++++
 3 files changed, 335 insertions(+), 2 deletions(-)
 create mode 100644 bsp/env/ventry.S

(limited to 'bsp')

diff --git a/bsp/env/coreplexip-e31-arty/init.c b/bsp/env/coreplexip-e31-arty/init.c
index 84ae09e..888f04f 100644
--- a/bsp/env/coreplexip-e31-arty/init.c
+++ b/bsp/env/coreplexip-e31-arty/init.c
@@ -10,8 +10,14 @@
 #define XSTR(x) #x
 #define STR(x) XSTR(x)
 
+#ifndef VECT_IRQ
+  #define TRAP_ENTRY trap_entry
+#else
+  #define TRAP_ENTRY vtrap_entry
+#endif
+
 extern int main(int argc, char** argv);
-extern void trap_entry();
+extern void TRAP_ENTRY();
 
 static unsigned long get_cpu_freq()
 {
@@ -57,6 +63,7 @@ typedef void (*my_interrupt_function_ptr_t) (void);
 extern my_interrupt_function_ptr_t localISR[];
 #endif
 
+#ifndef VECT_IRQ
 uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 {
   if (0){
@@ -81,6 +88,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
   }
   return epc;
 }
+#endif 
 
 void _init()
 {
@@ -89,7 +97,8 @@ void _init()
 
   puts("core freq at " STR(CPU_FREQ) " Hz\n");
 
-  write_csr(mtvec, &trap_entry);
+  write_csr(mtvec, ((unsigned long)&TRAP_ENTRY | MTVEC_VECTORED));
+
   #endif
 }
 
diff --git a/bsp/env/coreplexip-e31-arty/platform.h b/bsp/env/coreplexip-e31-arty/platform.h
index 42c8887..307a0c6 100644
--- a/bsp/env/coreplexip-e31-arty/platform.h
+++ b/bsp/env/coreplexip-e31-arty/platform.h
@@ -13,6 +13,11 @@
 #define MCAUSE_CAUSE       0x7FFFFFFFFFFFFFFFUL
 #endif
 
+#ifdef VECT_IRQ
+    #define MTVEC_VECTORED     0x01
+#else 
+    #define MTVEC_VECTORED     0x00
+#endif
 #define IRQ_M_LOCAL        16
 #define MIP_MLIP(x)        (1 << (IRQ_M_LOCAL + x))
 
diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
new file mode 100644
index 0000000..9c2f118
--- /dev/null
+++ b/bsp/env/ventry.S
@@ -0,0 +1,319 @@
+// See LICENSE for license details
+
+#ifndef VENTRY_S
+#define VENTRY_S
+
+#include "encoding.h"
+#include "sifive/bits.h"
+
+.macro TRAP_ENTRY
+  addi sp, sp, -32*REGBYTES
+
+  STORE x1, 1*REGBYTES(sp)
+  STORE x2, 2*REGBYTES(sp)
+  STORE x3, 3*REGBYTES(sp)
+  STORE x4, 4*REGBYTES(sp)
+  STORE x5, 5*REGBYTES(sp)
+  STORE x6, 6*REGBYTES(sp)
+  STORE x7, 7*REGBYTES(sp)
+  STORE x8, 8*REGBYTES(sp)
+  STORE x9, 9*REGBYTES(sp)
+  STORE x10, 10*REGBYTES(sp)
+  STORE x11, 11*REGBYTES(sp)
+  STORE x12, 12*REGBYTES(sp)
+  STORE x13, 13*REGBYTES(sp)
+  STORE x14, 14*REGBYTES(sp)
+  STORE x15, 15*REGBYTES(sp)
+  STORE x16, 16*REGBYTES(sp)
+  STORE x17, 17*REGBYTES(sp)
+  STORE x18, 18*REGBYTES(sp)
+  STORE x19, 19*REGBYTES(sp)
+  STORE x20, 20*REGBYTES(sp)
+  STORE x21, 21*REGBYTES(sp)
+  STORE x22, 22*REGBYTES(sp)
+  STORE x23, 23*REGBYTES(sp)
+  STORE x24, 24*REGBYTES(sp)
+  STORE x25, 25*REGBYTES(sp)
+  STORE x26, 26*REGBYTES(sp)
+  STORE x27, 27*REGBYTES(sp)
+  STORE x28, 28*REGBYTES(sp)
+  STORE x29, 29*REGBYTES(sp)
+  STORE x30, 30*REGBYTES(sp)
+  STORE x31, 31*REGBYTES(sp)
+.endm
+
+# Remain in M-mode after mret
+  li t0, MSTATUS_MPP
+  csrs mstatus, t0
+
+.macro TRAP_EXIT
+  LOAD x1, 1*REGBYTES(sp)
+  LOAD x2, 2*REGBYTES(sp)
+  LOAD x3, 3*REGBYTES(sp)
+  LOAD x4, 4*REGBYTES(sp)
+  LOAD x5, 5*REGBYTES(sp)
+  LOAD x6, 6*REGBYTES(sp)
+  LOAD x7, 7*REGBYTES(sp)
+  LOAD x8, 8*REGBYTES(sp)
+  LOAD x9, 9*REGBYTES(sp)
+  LOAD x10, 10*REGBYTES(sp)
+  LOAD x11, 11*REGBYTES(sp)
+  LOAD x12, 12*REGBYTES(sp)
+  LOAD x13, 13*REGBYTES(sp)
+  LOAD x14, 14*REGBYTES(sp)
+  LOAD x15, 15*REGBYTES(sp)
+  LOAD x16, 16*REGBYTES(sp)
+  LOAD x17, 17*REGBYTES(sp)
+  LOAD x18, 18*REGBYTES(sp)
+  LOAD x19, 19*REGBYTES(sp)
+  LOAD x20, 20*REGBYTES(sp)
+  LOAD x21, 21*REGBYTES(sp)
+  LOAD x22, 22*REGBYTES(sp)
+  LOAD x23, 23*REGBYTES(sp)
+  LOAD x24, 24*REGBYTES(sp)
+  LOAD x25, 25*REGBYTES(sp)
+  LOAD x26, 26*REGBYTES(sp)
+  LOAD x27, 27*REGBYTES(sp)
+  LOAD x28, 28*REGBYTES(sp)
+  LOAD x29, 29*REGBYTES(sp)
+  LOAD x30, 30*REGBYTES(sp)
+  LOAD x31, 31*REGBYTES(sp)
+
+  addi sp, sp, 32*REGBYTES
+  mret
+.endm
+
+#Vector table for E31/E51
+
+  .section      .text.entry	
+  .align 8
+  .global vtrap_entry
+vtrap_entry:
+  j sync_trap
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j vmsi_Handler
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j vmti_Handler
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j vmei_Handler
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+  .align 2
+  j reserved
+   .align 2
+  j reserved
+  .align 2
+  j vlip_Handler0
+  .align 2
+  j vlip_Handler1
+  .align 2
+  j vlip_Handler2
+  .align 2
+  j vlip_Handler3
+  .align 2
+  j vlip_Handler4
+  .align 2
+  .align 2
+  j vlip_Handler5
+  .align 2
+  j vlip_Handler6
+  .align 2
+  j vlip_Handler7
+  .align 2
+  j vlip_Handler8
+  .align 2
+  j vlip_Handler9
+  .align 2
+  j vlip_Handler10
+  .align 2
+  j vlip_Handler11
+  .align 2
+  j vlip_Handler12
+  .align 2
+  j vlip_Handler13
+  .align 2
+  j vlip_Handler14
+  .align 2
+  j vlip_Handler15
+  
+#synchronous trap
+sync_trap:
+  TRAP_ENTRY
+  csrr a0, mcause
+  csrr a1, mepc
+  mv a2, sp
+  jal handle_sync_trap
+  csrw mepc, a0
+  TRAP_EXIT
+
+#Machine Software Interrupt
+vmsi_Handler:
+  TRAP_ENTRY
+  jal reserved
+  TRAP_EXIT
+
+#Machine Timer Interrupt
+vmti_Handler:
+  TRAP_ENTRY
+  jal handle_m_time_interrupt
+  TRAP_EXIT
+
+#Machine External Interrupt
+vmei_Handler:
+  TRAP_ENTRY
+  jal handle_m_external_interrupt
+  TRAP_EXIT
+
+#LIP0
+vlip_Handler0:
+  TRAP_ENTRY
+  jal handle_local_interrupt0
+  TRAP_EXIT
+
+#LIP1
+vlip_Handler1:
+  TRAP_ENTRY
+  jal handle_local_interrupt1
+  TRAP_EXIT
+
+#LIP2
+vlip_Handler2:
+  TRAP_ENTRY
+  jal handle_local_interrupt2
+  TRAP_EXIT
+
+#LIP3
+vlip_Handler3:
+  TRAP_ENTRY
+  jal handle_local_interrupt3
+  TRAP_EXIT
+
+#LIP4
+vlip_Handler4:
+  TRAP_ENTRY
+  jal handle_local_interrupt4
+  TRAP_EXIT
+
+#LIP5
+vlip_Handler5:
+  TRAP_ENTRY
+  jal handle_local_interrupt5
+  TRAP_EXIT
+
+#LIP6
+vlip_Handler6:
+  TRAP_ENTRY
+  jal handle_local_interrupt6
+  TRAP_EXIT
+
+#LIP7
+vlip_Handler7:
+  TRAP_ENTRY
+  jal handle_local_interrupt7
+  TRAP_EXIT
+
+#LIP8
+vlip_Handler8:
+  TRAP_ENTRY
+  jal handle_local_interrupt8
+  TRAP_EXIT
+
+#LIP9
+vlip_Handler9:
+  TRAP_ENTRY
+  jal handle_local_interrupt9
+  TRAP_EXIT
+
+#LIP10
+vlip_Handler10:
+  TRAP_ENTRY
+  jal handle_local_interrupt10
+  TRAP_EXIT
+
+#LIP11
+vlip_Handler11:
+  TRAP_ENTRY
+  jal handle_local_interrupt11
+  TRAP_EXIT
+
+#LIP12
+vlip_Handler12:
+  TRAP_ENTRY
+  jal handle_local_interrupt12
+  TRAP_EXIT
+
+#LIP13
+vlip_Handler13:
+  TRAP_ENTRY
+  jal handle_local_interrupt13
+  TRAP_EXIT
+
+#LIP14
+vlip_Handler14:
+  TRAP_ENTRY
+  jal handle_local_interrupt14
+  TRAP_EXIT
+
+#LIP15
+vlip_Handler15:
+  TRAP_ENTRY
+  jal handle_local_interrupt15
+  TRAP_EXIT
+
+#unimplemented ISRs trap here
+.weak reserved
+reserved:
+.weak handle_local_interrupt0
+handle_local_interrupt0:
+.weak handle_local_interrupt1
+handle_local_interrupt1:
+.weak handle_local_interrupt2
+handle_local_interrupt2:
+.weak handle_local_interrupt3
+handle_local_interrupt3:
+.weak handle_local_interrupt4
+handle_local_interrupt4:
+.weak handle_local_interrupt5
+handle_local_interrupt5:
+.weak handle_local_interrupt6
+handle_local_interrupt6:
+.weak handle_local_interrupt7
+handle_local_interrupt7:
+.weak handle_local_interrupt8
+handle_local_interrupt8:
+.weak handle_local_interrupt9
+handle_local_interrupt9:
+.weak handle_local_interrupt10
+handle_local_interrupt10:
+.weak handle_local_interrupt11
+handle_local_interrupt11:
+.weak handle_local_interrupt12
+handle_local_interrupt12:
+.weak handle_local_interrupt13
+handle_local_interrupt13:
+.weak handle_local_interrupt14
+handle_local_interrupt14:
+.weak handle_local_interrupt15
+handle_local_interrupt15:
+1:
+  j 1b
+	
+#endif
-- 
cgit v1.2.3


From ad2936248189d3037173ba4bc9a8b9863bb83b76 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Tue, 25 Jul 2017 17:31:14 -0500
Subject: too many .aling 2's

---
 bsp/env/ventry.S | 1 -
 1 file changed, 1 deletion(-)

(limited to 'bsp')

diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
index 9c2f118..de6b197 100644
--- a/bsp/env/ventry.S
+++ b/bsp/env/ventry.S
@@ -131,7 +131,6 @@ vtrap_entry:
   .align 2
   j vlip_Handler4
   .align 2
-  .align 2
   j vlip_Handler5
   .align 2
   j vlip_Handler6
-- 
cgit v1.2.3


From 595d44b8c7857ff2aacc588ffcc54a1d1b763a65 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Wed, 26 Jul 2017 09:04:08 -0500
Subject: fixed TRAP_EXIT macro. TRAP_ENTRY/EXIT2 only saves/restores callee
 registers

---
 bsp/env/ventry.S | 59 +++++++++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 52 insertions(+), 7 deletions(-)

(limited to 'bsp')

diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
index de6b197..ed79789 100644
--- a/bsp/env/ventry.S
+++ b/bsp/env/ventry.S
@@ -42,11 +42,11 @@
   STORE x31, 31*REGBYTES(sp)
 .endm
 
+.macro TRAP_EXIT
 # Remain in M-mode after mret
   li t0, MSTATUS_MPP
   csrs mstatus, t0
 
-.macro TRAP_EXIT
   LOAD x1, 1*REGBYTES(sp)
   LOAD x2, 2*REGBYTES(sp)
   LOAD x3, 3*REGBYTES(sp)
@@ -83,6 +83,51 @@
   mret
 .endm
 
+
+
+.macro TRAP_ENTRY2
+  addi sp, sp, -14*REGBYTES
+
+  STORE x2, 1*REGBYTES(sp)
+  STORE x8, 2*REGBYTES(sp)
+  STORE x9, 3*REGBYTES(sp)
+  STORE x18, 4*REGBYTES(sp)
+  STORE x19, 5*REGBYTES(sp)
+  STORE x20, 6*REGBYTES(sp)
+  STORE x21, 7*REGBYTES(sp)
+  STORE x22, 8*REGBYTES(sp)
+  STORE x23, 9*REGBYTES(sp)
+  STORE x24, 10*REGBYTES(sp)
+  STORE x25, 11*REGBYTES(sp)
+  STORE x26, 12*REGBYTES(sp)
+  STORE x27, 13*REGBYTES(sp)
+.endm
+
+.macro TRAP_EXIT2
+# Remain in M-mode after mret
+  li t0, MSTATUS_MPP
+  csrs mstatus, t0
+
+  LOAD x3, 1*REGBYTES(sp)
+  LOAD x8, 2*REGBYTES(sp)
+  LOAD x9, 3*REGBYTES(sp)
+  LOAD x18, 4*REGBYTES(sp)
+  LOAD x19, 5*REGBYTES(sp)
+  LOAD x20, 6*REGBYTES(sp)
+  LOAD x21, 7*REGBYTES(sp)
+  LOAD x22, 8*REGBYTES(sp)
+  LOAD x23, 9*REGBYTES(sp)
+  LOAD x24, 10*REGBYTES(sp)
+  LOAD x25, 11*REGBYTES(sp)
+  LOAD x26, 12*REGBYTES(sp)
+  LOAD x27, 13*REGBYTES(sp)
+
+  addi sp, sp, 14*REGBYTES
+  mret
+.endm
+
+
+
 #Vector table for E31/E51
 
   .section      .text.entry	
@@ -171,15 +216,15 @@ vmsi_Handler:
 
 #Machine Timer Interrupt
 vmti_Handler:
-  TRAP_ENTRY
+  TRAP_ENTRY2
   jal handle_m_time_interrupt
-  TRAP_EXIT
+  TRAP_EXIT2
 
 #Machine External Interrupt
 vmei_Handler:
-  TRAP_ENTRY
+  TRAP_ENTRY2
   jal handle_m_external_interrupt
-  TRAP_EXIT
+  TRAP_EXIT2
 
 #LIP0
 vlip_Handler0:
@@ -213,9 +258,9 @@ vlip_Handler4:
 
 #LIP5
 vlip_Handler5:
-  TRAP_ENTRY
+  TRAP_ENTRY2
   jal handle_local_interrupt5
-  TRAP_EXIT
+  TRAP_EXIT2
 
 #LIP6
 vlip_Handler6:
-- 
cgit v1.2.3


From 97e8e1a190d5a693c5c3c4911c5a6df131bf43a2 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Wed, 26 Jul 2017 14:59:11 -0500
Subject: only save/restore caller registers on trap entry

---
 bsp/env/ventry.S | 161 ++++++++++++++++---------------------------------------
 1 file changed, 46 insertions(+), 115 deletions(-)

(limited to 'bsp')

diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
index ed79789..6b672e5 100644
--- a/bsp/env/ventry.S
+++ b/bsp/env/ventry.S
@@ -6,123 +6,54 @@
 #include "encoding.h"
 #include "sifive/bits.h"
 
+#only save caller registers
 .macro TRAP_ENTRY
-  addi sp, sp, -32*REGBYTES
-
-  STORE x1, 1*REGBYTES(sp)
-  STORE x2, 2*REGBYTES(sp)
-  STORE x3, 3*REGBYTES(sp)
-  STORE x4, 4*REGBYTES(sp)
-  STORE x5, 5*REGBYTES(sp)
-  STORE x6, 6*REGBYTES(sp)
-  STORE x7, 7*REGBYTES(sp)
-  STORE x8, 8*REGBYTES(sp)
-  STORE x9, 9*REGBYTES(sp)
-  STORE x10, 10*REGBYTES(sp)
-  STORE x11, 11*REGBYTES(sp)
-  STORE x12, 12*REGBYTES(sp)
-  STORE x13, 13*REGBYTES(sp)
-  STORE x14, 14*REGBYTES(sp)
-  STORE x15, 15*REGBYTES(sp)
-  STORE x16, 16*REGBYTES(sp)
-  STORE x17, 17*REGBYTES(sp)
-  STORE x18, 18*REGBYTES(sp)
-  STORE x19, 19*REGBYTES(sp)
-  STORE x20, 20*REGBYTES(sp)
-  STORE x21, 21*REGBYTES(sp)
-  STORE x22, 22*REGBYTES(sp)
-  STORE x23, 23*REGBYTES(sp)
-  STORE x24, 24*REGBYTES(sp)
-  STORE x25, 25*REGBYTES(sp)
-  STORE x26, 26*REGBYTES(sp)
-  STORE x27, 27*REGBYTES(sp)
-  STORE x28, 28*REGBYTES(sp)
-  STORE x29, 29*REGBYTES(sp)
-  STORE x30, 30*REGBYTES(sp)
-  STORE x31, 31*REGBYTES(sp)
+  addi sp, sp, -18*REGBYTES
+
+  STORE x1,  1*REGBYTES(sp)
+  STORE x5,  2*REGBYTES(sp)
+  STORE x6,  3*REGBYTES(sp)
+  STORE x7,  4*REGBYTES(sp)
+  STORE x10, 5*REGBYTES(sp)
+  STORE x11, 6*REGBYTES(sp)
+  STORE x12, 7*REGBYTES(sp)
+  STORE x13, 8*REGBYTES(sp)
+  STORE x14, 9*REGBYTES(sp)
+  STORE x15, 10*REGBYTES(sp)
+  STORE x16, 11*REGBYTES(sp)
+  STORE x17, 12*REGBYTES(sp)
+  STORE x18, 13*REGBYTES(sp)
+  STORE x28, 14*REGBYTES(sp)
+  STORE x29, 15*REGBYTES(sp)
+  STORE x30, 16*REGBYTES(sp)
+  STORE x31, 17*REGBYTES(sp)
 .endm
 
+#restore caller registers
 .macro TRAP_EXIT
 # Remain in M-mode after mret
   li t0, MSTATUS_MPP
   csrs mstatus, t0
 
-  LOAD x1, 1*REGBYTES(sp)
-  LOAD x2, 2*REGBYTES(sp)
-  LOAD x3, 3*REGBYTES(sp)
-  LOAD x4, 4*REGBYTES(sp)
-  LOAD x5, 5*REGBYTES(sp)
-  LOAD x6, 6*REGBYTES(sp)
-  LOAD x7, 7*REGBYTES(sp)
-  LOAD x8, 8*REGBYTES(sp)
-  LOAD x9, 9*REGBYTES(sp)
-  LOAD x10, 10*REGBYTES(sp)
-  LOAD x11, 11*REGBYTES(sp)
-  LOAD x12, 12*REGBYTES(sp)
-  LOAD x13, 13*REGBYTES(sp)
-  LOAD x14, 14*REGBYTES(sp)
-  LOAD x15, 15*REGBYTES(sp)
-  LOAD x16, 16*REGBYTES(sp)
-  LOAD x17, 17*REGBYTES(sp)
-  LOAD x18, 18*REGBYTES(sp)
-  LOAD x19, 19*REGBYTES(sp)
-  LOAD x20, 20*REGBYTES(sp)
-  LOAD x21, 21*REGBYTES(sp)
-  LOAD x22, 22*REGBYTES(sp)
-  LOAD x23, 23*REGBYTES(sp)
-  LOAD x24, 24*REGBYTES(sp)
-  LOAD x25, 25*REGBYTES(sp)
-  LOAD x26, 26*REGBYTES(sp)
-  LOAD x27, 27*REGBYTES(sp)
-  LOAD x28, 28*REGBYTES(sp)
-  LOAD x29, 29*REGBYTES(sp)
-  LOAD x30, 30*REGBYTES(sp)
-  LOAD x31, 31*REGBYTES(sp)
-
-  addi sp, sp, 32*REGBYTES
-  mret
-.endm
-
-
-
-.macro TRAP_ENTRY2
-  addi sp, sp, -14*REGBYTES
-
-  STORE x2, 1*REGBYTES(sp)
-  STORE x8, 2*REGBYTES(sp)
-  STORE x9, 3*REGBYTES(sp)
-  STORE x18, 4*REGBYTES(sp)
-  STORE x19, 5*REGBYTES(sp)
-  STORE x20, 6*REGBYTES(sp)
-  STORE x21, 7*REGBYTES(sp)
-  STORE x22, 8*REGBYTES(sp)
-  STORE x23, 9*REGBYTES(sp)
-  STORE x24, 10*REGBYTES(sp)
-  STORE x25, 11*REGBYTES(sp)
-  STORE x26, 12*REGBYTES(sp)
-  STORE x27, 13*REGBYTES(sp)
-.endm
-
-.macro TRAP_EXIT2
-# Remain in M-mode after mret
-  li t0, MSTATUS_MPP
-  csrs mstatus, t0
-
-  LOAD x3, 1*REGBYTES(sp)
-  LOAD x8, 2*REGBYTES(sp)
-  LOAD x9, 3*REGBYTES(sp)
-  LOAD x18, 4*REGBYTES(sp)
-  LOAD x19, 5*REGBYTES(sp)
-  LOAD x20, 6*REGBYTES(sp)
-  LOAD x21, 7*REGBYTES(sp)
-  LOAD x22, 8*REGBYTES(sp)
-  LOAD x23, 9*REGBYTES(sp)
-  LOAD x24, 10*REGBYTES(sp)
-  LOAD x25, 11*REGBYTES(sp)
-  LOAD x26, 12*REGBYTES(sp)
-  LOAD x27, 13*REGBYTES(sp)
-
-  addi sp, sp, 14*REGBYTES
+  LOAD x1,  1*REGBYTES(sp)
+  LOAD x5,  2*REGBYTES(sp)
+  LOAD x6,  3*REGBYTES(sp)
+  LOAD x7,  4*REGBYTES(sp)
+  LOAD x10, 5*REGBYTES(sp)
+  LOAD x11, 6*REGBYTES(sp)
+  LOAD x12, 7*REGBYTES(sp)
+  LOAD x13, 8*REGBYTES(sp)
+  LOAD x14, 9*REGBYTES(sp)
+  LOAD x15, 10*REGBYTES(sp)
+  LOAD x16, 11*REGBYTES(sp)
+  LOAD x17, 12*REGBYTES(sp)
+  LOAD x18, 13*REGBYTES(sp)
+  LOAD x28, 14*REGBYTES(sp)
+  LOAD x29, 15*REGBYTES(sp)
+  LOAD x30, 16*REGBYTES(sp)
+  LOAD x31, 17*REGBYTES(sp)
+
+  addi sp, sp, 18*REGBYTES
   mret
 .endm
 
@@ -216,15 +147,15 @@ vmsi_Handler:
 
 #Machine Timer Interrupt
 vmti_Handler:
-  TRAP_ENTRY2
+  TRAP_ENTRY
   jal handle_m_time_interrupt
-  TRAP_EXIT2
+  TRAP_EXIT
 
 #Machine External Interrupt
 vmei_Handler:
-  TRAP_ENTRY2
+  TRAP_ENTRY
   jal handle_m_external_interrupt
-  TRAP_EXIT2
+  TRAP_EXIT
 
 #LIP0
 vlip_Handler0:
@@ -258,9 +189,9 @@ vlip_Handler4:
 
 #LIP5
 vlip_Handler5:
-  TRAP_ENTRY2
+  TRAP_ENTRY
   jal handle_local_interrupt5
-  TRAP_EXIT2
+  TRAP_EXIT
 
 #LIP6
 vlip_Handler6:
-- 
cgit v1.2.3


From 4633b6fcda49604159322bbee941957b2bf67502 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Wed, 26 Jul 2017 15:18:25 -0500
Subject: removed save/restore of x18

---
 bsp/env/ventry.S | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

(limited to 'bsp')

diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
index 6b672e5..5cdd4b7 100644
--- a/bsp/env/ventry.S
+++ b/bsp/env/ventry.S
@@ -8,7 +8,7 @@
 
 #only save caller registers
 .macro TRAP_ENTRY
-  addi sp, sp, -18*REGBYTES
+  addi sp, sp, -17*REGBYTES
 
   STORE x1,  1*REGBYTES(sp)
   STORE x5,  2*REGBYTES(sp)
@@ -22,11 +22,10 @@
   STORE x15, 10*REGBYTES(sp)
   STORE x16, 11*REGBYTES(sp)
   STORE x17, 12*REGBYTES(sp)
-  STORE x18, 13*REGBYTES(sp)
-  STORE x28, 14*REGBYTES(sp)
-  STORE x29, 15*REGBYTES(sp)
-  STORE x30, 16*REGBYTES(sp)
-  STORE x31, 17*REGBYTES(sp)
+  STORE x28, 13*REGBYTES(sp)
+  STORE x29, 14*REGBYTES(sp)
+  STORE x30, 15*REGBYTES(sp)
+  STORE x31, 16*REGBYTES(sp)
 .endm
 
 #restore caller registers
@@ -47,13 +46,12 @@
   LOAD x15, 10*REGBYTES(sp)
   LOAD x16, 11*REGBYTES(sp)
   LOAD x17, 12*REGBYTES(sp)
-  LOAD x18, 13*REGBYTES(sp)
-  LOAD x28, 14*REGBYTES(sp)
-  LOAD x29, 15*REGBYTES(sp)
-  LOAD x30, 16*REGBYTES(sp)
-  LOAD x31, 17*REGBYTES(sp)
+  LOAD x28, 13*REGBYTES(sp)
+  LOAD x29, 14*REGBYTES(sp)
+  LOAD x30, 15*REGBYTES(sp)
+  LOAD x31, 16*REGBYTES(sp)
 
-  addi sp, sp, 18*REGBYTES
+  addi sp, sp, 17*REGBYTES
   mret
 .endm
 
-- 
cgit v1.2.3


From 7ce4b61da3e41c441c3634352782abc9819adf39 Mon Sep 17 00:00:00 2001
From: Drew Barbier <dbarbi1@gmail.com>
Date: Wed, 26 Jul 2017 15:49:18 -0500
Subject: changed synch trap entry to match other vectors

---
 bsp/env/ventry.S | 72 ++++++++++++++++++++++++++------------------------------
 1 file changed, 34 insertions(+), 38 deletions(-)

(limited to 'bsp')

diff --git a/bsp/env/ventry.S b/bsp/env/ventry.S
index 5cdd4b7..5c82c48 100644
--- a/bsp/env/ventry.S
+++ b/bsp/env/ventry.S
@@ -8,24 +8,24 @@
 
 #only save caller registers
 .macro TRAP_ENTRY
-  addi sp, sp, -17*REGBYTES
+  addi sp, sp, -16*REGBYTES
 
-  STORE x1,  1*REGBYTES(sp)
-  STORE x5,  2*REGBYTES(sp)
-  STORE x6,  3*REGBYTES(sp)
-  STORE x7,  4*REGBYTES(sp)
-  STORE x10, 5*REGBYTES(sp)
-  STORE x11, 6*REGBYTES(sp)
-  STORE x12, 7*REGBYTES(sp)
-  STORE x13, 8*REGBYTES(sp)
-  STORE x14, 9*REGBYTES(sp)
-  STORE x15, 10*REGBYTES(sp)
-  STORE x16, 11*REGBYTES(sp)
-  STORE x17, 12*REGBYTES(sp)
-  STORE x28, 13*REGBYTES(sp)
-  STORE x29, 14*REGBYTES(sp)
-  STORE x30, 15*REGBYTES(sp)
-  STORE x31, 16*REGBYTES(sp)
+  STORE x1,  0*REGBYTES(sp)
+  STORE x5,  1*REGBYTES(sp)
+  STORE x6,  2*REGBYTES(sp)
+  STORE x7,  3*REGBYTES(sp)
+  STORE x10, 4*REGBYTES(sp)
+  STORE x11, 5*REGBYTES(sp)
+  STORE x12, 6*REGBYTES(sp)
+  STORE x13, 7*REGBYTES(sp)
+  STORE x14, 8*REGBYTES(sp)
+  STORE x15, 9*REGBYTES(sp)
+  STORE x16, 10*REGBYTES(sp)
+  STORE x17, 11*REGBYTES(sp)
+  STORE x28, 12*REGBYTES(sp)
+  STORE x29, 13*REGBYTES(sp)
+  STORE x30, 14*REGBYTES(sp)
+  STORE x31, 15*REGBYTES(sp)
 .endm
 
 #restore caller registers
@@ -34,24 +34,24 @@
   li t0, MSTATUS_MPP
   csrs mstatus, t0
 
-  LOAD x1,  1*REGBYTES(sp)
-  LOAD x5,  2*REGBYTES(sp)
-  LOAD x6,  3*REGBYTES(sp)
-  LOAD x7,  4*REGBYTES(sp)
-  LOAD x10, 5*REGBYTES(sp)
-  LOAD x11, 6*REGBYTES(sp)
-  LOAD x12, 7*REGBYTES(sp)
-  LOAD x13, 8*REGBYTES(sp)
-  LOAD x14, 9*REGBYTES(sp)
-  LOAD x15, 10*REGBYTES(sp)
-  LOAD x16, 11*REGBYTES(sp)
-  LOAD x17, 12*REGBYTES(sp)
-  LOAD x28, 13*REGBYTES(sp)
-  LOAD x29, 14*REGBYTES(sp)
-  LOAD x30, 15*REGBYTES(sp)
-  LOAD x31, 16*REGBYTES(sp)
+  LOAD x1,  0*REGBYTES(sp)
+  LOAD x5,  1*REGBYTES(sp)
+  LOAD x6,  2*REGBYTES(sp)
+  LOAD x7,  3*REGBYTES(sp)
+  LOAD x10, 4*REGBYTES(sp)
+  LOAD x11, 5*REGBYTES(sp)
+  LOAD x12, 6*REGBYTES(sp)
+  LOAD x13, 7*REGBYTES(sp)
+  LOAD x14, 8*REGBYTES(sp)
+  LOAD x15, 9*REGBYTES(sp)
+  LOAD x16, 10*REGBYTES(sp)
+  LOAD x17, 11*REGBYTES(sp)
+  LOAD x28, 12*REGBYTES(sp)
+  LOAD x29, 13*REGBYTES(sp)
+  LOAD x30, 14*REGBYTES(sp)
+  LOAD x31, 15*REGBYTES(sp)
 
-  addi sp, sp, 17*REGBYTES
+  addi sp, sp, 16*REGBYTES
   mret
 .endm
 
@@ -130,11 +130,7 @@ vtrap_entry:
 #synchronous trap
 sync_trap:
   TRAP_ENTRY
-  csrr a0, mcause
-  csrr a1, mepc
-  mv a2, sp
   jal handle_sync_trap
-  csrw mepc, a0
   TRAP_EXIT
 
 #Machine Software Interrupt
-- 
cgit v1.2.3