From db80f993967d9fe27be362df1fa38e6ec3b411d5 Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Wed, 10 Apr 2019 10:52:43 -0700 Subject: Add missing PMP nodes Signed-off-by: Nathaniel Graff --- bsp/coreip-e21-arty/design.dts | 4 ++++ bsp/coreip-e21-arty/metal.h | 11 +++++++++++ bsp/coreip-e24-arty/design.dts | 4 ++++ bsp/coreip-e24-arty/metal.h | 11 +++++++++++ bsp/coreip-e76-arty/design.dts | 4 ++++ bsp/coreip-e76-arty/metal.h | 11 +++++++++++ bsp/coreip-e76-rtl/design.dts | 4 ++++ bsp/coreip-e76-rtl/metal.h | 11 +++++++++++ bsp/coreip-s76-arty/design.dts | 4 ++++ bsp/coreip-s76-arty/metal.h | 11 +++++++++++ bsp/coreip-s76-rtl/design.dts | 4 ++++ bsp/coreip-s76-rtl/metal.h | 11 +++++++++++ 12 files changed, 90 insertions(+) (limited to 'bsp') diff --git a/bsp/coreip-e21-arty/design.dts b/bsp/coreip-e21-arty/design.dts index 6ac4e18..7303568 100644 --- a/bsp/coreip-e21-arty/design.dts +++ b/bsp/coreip-e21-arty/design.dts @@ -36,6 +36,10 @@ #size-cells = <1>; compatible = "SiFive,FE210G-soc", "fe210-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <4>; + }; hfclk: clock@0 { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/bsp/coreip-e21-arty/metal.h b/bsp/coreip-e21-arty/metal.h index 872fde6..0223894 100644 --- a/bsp/coreip-e21-arty/metal.h +++ b/bsp/coreip-e21-arty/metal.h @@ -70,6 +70,9 @@ struct __metal_driver_cpu __metal_dt_cpu_0; asm (".weak __metal_dt_interrupt_controller"); struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From interrupt_controller@2000000 */ asm (".weak __metal_dt_interrupt_controller_2000000"); struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000; @@ -166,6 +169,11 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 4UL, +}; + /* From interrupt_controller@2000000 */ struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { .vtable = &__metal_driver_vtable_sifive_clic0, @@ -549,6 +557,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From interrupt_controller@2000000 */ #define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) diff --git a/bsp/coreip-e24-arty/design.dts b/bsp/coreip-e24-arty/design.dts index 9d08297..f288b54 100644 --- a/bsp/coreip-e24-arty/design.dts +++ b/bsp/coreip-e24-arty/design.dts @@ -36,6 +36,10 @@ #size-cells = <1>; compatible = "SiFive,FE240G-soc", "fe240-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <4>; + }; hfclk: clock@0 { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/bsp/coreip-e24-arty/metal.h b/bsp/coreip-e24-arty/metal.h index 47e0f67..f04b38b 100644 --- a/bsp/coreip-e24-arty/metal.h +++ b/bsp/coreip-e24-arty/metal.h @@ -70,6 +70,9 @@ struct __metal_driver_cpu __metal_dt_cpu_0; asm (".weak __metal_dt_interrupt_controller"); struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From interrupt_controller@2000000 */ asm (".weak __metal_dt_interrupt_controller_2000000"); struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000; @@ -166,6 +169,11 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 4UL, +}; + /* From interrupt_controller@2000000 */ struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { .vtable = &__metal_driver_vtable_sifive_clic0, @@ -549,6 +557,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From interrupt_controller@2000000 */ #define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) diff --git a/bsp/coreip-e76-arty/design.dts b/bsp/coreip-e76-arty/design.dts index 55edc8b..1ea526f 100644 --- a/bsp/coreip-e76-arty/design.dts +++ b/bsp/coreip-e76-arty/design.dts @@ -47,6 +47,10 @@ #size-cells = <1>; compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <8>; + }; L2: clint@2000000 { compatible = "riscv,clint0"; interrupts-extended = <&L4 3 &L4 7>; diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h index 6365e99..35ad054 100644 --- a/bsp/coreip-e76-arty/metal.h +++ b/bsp/coreip-e76-arty/metal.h @@ -80,6 +80,9 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From global_external_interrupts */ asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -200,6 +203,11 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 8UL, +}; + /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, @@ -454,6 +462,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) diff --git a/bsp/coreip-e76-rtl/design.dts b/bsp/coreip-e76-rtl/design.dts index 6d94a9b..40c0004 100644 --- a/bsp/coreip-e76-rtl/design.dts +++ b/bsp/coreip-e76-rtl/design.dts @@ -40,6 +40,10 @@ #size-cells = <1>; compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <8>; + }; L11: axi4-periph-port@20000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/bsp/coreip-e76-rtl/metal.h b/bsp/coreip-e76-rtl/metal.h index 31671df..393700c 100644 --- a/bsp/coreip-e76-rtl/metal.h +++ b/bsp/coreip-e76-rtl/metal.h @@ -64,6 +64,9 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From global_external_interrupts */ asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -117,6 +120,11 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 8UL, +}; + /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, @@ -289,6 +297,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) diff --git a/bsp/coreip-s76-arty/design.dts b/bsp/coreip-s76-arty/design.dts index 736d909..b5af1f3 100644 --- a/bsp/coreip-s76-arty/design.dts +++ b/bsp/coreip-s76-arty/design.dts @@ -47,6 +47,10 @@ #size-cells = <1>; compatible = "SiFive,FS760G-soc", "fs710-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <1>; + }; L2: clint@2000000 { compatible = "riscv,clint0"; interrupts-extended = <&L4 3 &L4 7>; diff --git a/bsp/coreip-s76-arty/metal.h b/bsp/coreip-s76-arty/metal.h index 752d7a3..04f7436 100644 --- a/bsp/coreip-s76-arty/metal.h +++ b/bsp/coreip-s76-arty/metal.h @@ -80,6 +80,9 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From global_external_interrupts */ asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -200,6 +203,11 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 1UL, +}; + /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, @@ -454,6 +462,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) diff --git a/bsp/coreip-s76-rtl/design.dts b/bsp/coreip-s76-rtl/design.dts index f27053d..a4fd9c8 100644 --- a/bsp/coreip-s76-rtl/design.dts +++ b/bsp/coreip-s76-rtl/design.dts @@ -40,6 +40,10 @@ #size-cells = <2>; compatible = "SiFive,FS760G-soc", "fs710-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <8>; + }; L11: axi4-periph-port@20000000 { #address-cells = <2>; #size-cells = <2>; diff --git a/bsp/coreip-s76-rtl/metal.h b/bsp/coreip-s76-rtl/metal.h index 8b8acbc..8f096d0 100644 --- a/bsp/coreip-s76-rtl/metal.h +++ b/bsp/coreip-s76-rtl/metal.h @@ -64,6 +64,9 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From global_external_interrupts */ asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -117,6 +120,11 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 8UL, +}; + /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, @@ -289,6 +297,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) -- cgit v1.2.1-18-gbd029