From 628d2b3559be5e9e651801d289a075d68df820e8 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 3 Jan 2017 17:58:18 -0800 Subject: Compile Dhrystone without RVC Branch target misalignment reduces performance by about 10%. --- software/dhrystone/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'software/dhrystone') diff --git a/software/dhrystone/Makefile b/software/dhrystone/Makefile index a55b1ec..78a7b23 100644 --- a/software/dhrystone/Makefile +++ b/software/dhrystone/Makefile @@ -5,7 +5,7 @@ C_SRCS := dhry_stubs.c dhry_printf.c HEADERS := dhry.h DHRY_SRCS := dhry_1.c dhry_2.c -DHRY_CFLAGS := -O2 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit +DHRY_CFLAGS := -O2 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit -march=rv32ima XLEN ?= 32 CFLAGS := -Os -fno-common -- cgit v1.2.3