From 4d5cbec9118cbedf2d4ae5b54acaa22862245a4c Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 4 May 2017 05:46:05 -0700 Subject: Update SDK For E31/E51 Coreplex IP Evaluation --- software/double_tap_dontboot/double_tap_dontboot.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'software/double_tap_dontboot') diff --git a/software/double_tap_dontboot/double_tap_dontboot.c b/software/double_tap_dontboot/double_tap_dontboot.c index 0cae5b5..53c2c64 100644 --- a/software/double_tap_dontboot/double_tap_dontboot.c +++ b/software/double_tap_dontboot/double_tap_dontboot.c @@ -42,6 +42,11 @@ #include "platform.h" #include "encoding.h" +#ifndef _SIFIVE_HIFIVE1_H +#error "double_tap_dontboot is designed to run on HiFive1 and/or E300 Arty Dev Kit." +#endif + + #define BACKUP15_MAGIC 0xD027B007 #define FINAL_ADDRESS 0x20400000 @@ -97,9 +102,9 @@ int main(void) // because it makes it clear that the processor is actually // running this code, not just the PWM hardware. - now = *((volatile uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME)); + now = *((volatile uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME)); then = now + 32768/500; - while (*((volatile uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME)) < then) { + while (*((volatile uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME)) < then) { asm volatile (""); } pwm_val = (pwm_val == 0) ? 255 : (pwm_val -1); @@ -121,9 +126,9 @@ int main(void) // Wait 500 ms. If reset is tapped at this point, // we will execute the "magic" loop above. - now = *((volatile uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME)); + now = *((volatile uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME)); then = now + 32768/2; - while (*((volatile uint64_t*) (CLINT_BASE_ADDR + CLINT_MTIME)) < then) { + while (*((volatile uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME)) < then) { asm volatile (""); } -- cgit v1.2.3