/* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ /* ----------------------------------- */ #ifndef SIFIVE_HIFIVE_UNLEASHED____METAL_PLATFORM_H #define SIFIVE_HIFIVE_UNLEASHED____METAL_PLATFORM_H /* From refclk */ #define METAL_FIXED_CLOCK__CLOCK_FREQUENCY 33333333UL #define METAL_FIXED_CLOCK /* From tlclk */ #define METAL_FIXED_FACTOR_CLOCK__CLOCK_DIV 2UL #define METAL_FIXED_FACTOR_CLOCK__CLOCK_MULT 1UL #define METAL_FIXED_FACTOR_CLOCK /* From clint@2000000 */ #define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL #define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL #define METAL_RISCV_CLINT0_2000000_SIZE 65536UL #define METAL_RISCV_CLINT0_0_SIZE 65536UL #define METAL_RISCV_CLINT0 #define METAL_RISCV_CLINT0_MSIP_BASE 0UL #define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL #define METAL_RISCV_CLINT0_MTIME 49144UL /* From interrupt_controller@c000000 */ #define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL #define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL #define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL #define METAL_RISCV_PLIC0_0_SIZE 67108864UL #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 54UL #define METAL_RISCV_PLIC0_0_RISCV_NDEV 54UL #define METAL_RISCV_PLIC0 #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL #define METAL_RISCV_PLIC0_PENDING_BASE 4096UL #define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL #define METAL_RISCV_PLIC0_THRESHOLD 2097152UL #define METAL_RISCV_PLIC0_CLAIM 2097156UL /* From cache_controller@2010000 */ #define METAL_SIFIVE_FU540_C000_L2_2010000_BASE_ADDRESS 33619968UL #define METAL_SIFIVE_FU540_C000_L2_0_BASE_ADDRESS 33619968UL #define METAL_SIFIVE_FU540_C000_L2_2010000_SIZE 4096UL #define METAL_SIFIVE_FU540_C000_L2_0_SIZE 4096UL #define METAL_SIFIVE_FU540_C000_L2 #define METAL_SIFIVE_FU540_C000_L2_CONFIG 0UL #define METAL_SIFIVE_FU540_C000_L2_WAYENABLE 8UL /* From gpio@10060000 */ #define METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS 268828672UL #define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268828672UL #define METAL_SIFIVE_GPIO0_10060000_SIZE 4096UL #define METAL_SIFIVE_GPIO0_0_SIZE 4096UL #define METAL_SIFIVE_GPIO0 #define METAL_SIFIVE_GPIO0_VALUE 0UL #define METAL_SIFIVE_GPIO0_INPUT_EN 4UL #define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL #define METAL_SIFIVE_GPIO0_PORT 12UL #define METAL_SIFIVE_GPIO0_PUE 16UL #define METAL_SIFIVE_GPIO0_DS 20UL #define METAL_SIFIVE_GPIO0_RISE_IE 24UL #define METAL_SIFIVE_GPIO0_RISE_IP 28UL #define METAL_SIFIVE_GPIO0_FALL_IE 32UL #define METAL_SIFIVE_GPIO0_FALL_IP 36UL #define METAL_SIFIVE_GPIO0_HIGH_IE 40UL #define METAL_SIFIVE_GPIO0_HIGH_IP 44UL #define METAL_SIFIVE_GPIO0_LOW_IE 48UL #define METAL_SIFIVE_GPIO0_LOW_IP 52UL #define METAL_SIFIVE_GPIO0_IOF_EN 56UL #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL /* From i2c@10030000 */ #define METAL_SIFIVE_I2C0_10030000_BASE_ADDRESS 268632064UL #define METAL_SIFIVE_I2C0_0_BASE_ADDRESS 268632064UL #define METAL_SIFIVE_I2C0_10030000_SIZE 4096UL #define METAL_SIFIVE_I2C0_0_SIZE 4096UL #define METAL_SIFIVE_I2C0 #define METAL_SIFIVE_I2C0_PRESCALE_LOW 0UL #define METAL_SIFIVE_I2C0_PRESCALE_HIGH 4UL #define METAL_SIFIVE_I2C0_CONTROL 8UL #define METAL_SIFIVE_I2C0_TRANSMIT 12UL #define METAL_SIFIVE_I2C0_RECEIVE 12UL #define METAL_SIFIVE_I2C0_COMMAND 16UL #define METAL_SIFIVE_I2C0_STATUS 16UL /* From pwm@10020000 */ #define METAL_SIFIVE_PWM0_10020000_BASE_ADDRESS 268566528UL #define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268566528UL #define METAL_SIFIVE_PWM0_10020000_SIZE 4096UL #define METAL_SIFIVE_PWM0_0_SIZE 4096UL /* From pwm@10021000 */ #define METAL_SIFIVE_PWM0_10021000_BASE_ADDRESS 268570624UL #define METAL_SIFIVE_PWM0_1_BASE_ADDRESS 268570624UL #define METAL_SIFIVE_PWM0_10021000_SIZE 4096UL #define METAL_SIFIVE_PWM0_1_SIZE 4096UL #define METAL_SIFIVE_PWM0 #define METAL_SIFIVE_PWM0_PWMCFG 0UL #define METAL_SIFIVE_PWM0_PWMCOUNT 8UL #define METAL_SIFIVE_PWM0_PWMS 16UL #define METAL_SIFIVE_PWM0_PWMCMP0 32UL #define METAL_SIFIVE_PWM0_PWMCMP1 36UL #define METAL_SIFIVE_PWM0_PWMCMP2 40UL #define METAL_SIFIVE_PWM0_PWMCMP3 44UL /* From spi@10040000 */ #define METAL_SIFIVE_SPI0_10040000_BASE_ADDRESS 268697600UL #define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268697600UL #define METAL_SIFIVE_SPI0_10040000_SIZE 4096UL #define METAL_SIFIVE_SPI0_0_SIZE 4096UL /* From spi@10041000 */ #define METAL_SIFIVE_SPI0_10041000_BASE_ADDRESS 268701696UL #define METAL_SIFIVE_SPI0_1_BASE_ADDRESS 268701696UL #define METAL_SIFIVE_SPI0_10041000_SIZE 4096UL #define METAL_SIFIVE_SPI0_1_SIZE 4096UL /* From spi@10050000 */ #define METAL_SIFIVE_SPI0_10050000_BASE_ADDRESS 268763136UL #define METAL_SIFIVE_SPI0_2_BASE_ADDRESS 268763136UL #define METAL_SIFIVE_SPI0_10050000_SIZE 4096UL #define METAL_SIFIVE_SPI0_2_SIZE 4096UL #define METAL_SIFIVE_SPI0 #define METAL_SIFIVE_SPI0_SCKDIV 0UL #define METAL_SIFIVE_SPI0_SCKMODE 4UL #define METAL_SIFIVE_SPI0_CSID 16UL #define METAL_SIFIVE_SPI0_CSDEF 20UL #define METAL_SIFIVE_SPI0_CSMODE 24UL #define METAL_SIFIVE_SPI0_DELAY0 40UL #define METAL_SIFIVE_SPI0_DELAY1 44UL #define METAL_SIFIVE_SPI0_FMT 64UL #define METAL_SIFIVE_SPI0_TXDATA 72UL #define METAL_SIFIVE_SPI0_RXDATA 76UL #define METAL_SIFIVE_SPI0_TXMARK 80UL #define METAL_SIFIVE_SPI0_RXMARK 84UL #define METAL_SIFIVE_SPI0_FCTRL 96UL #define METAL_SIFIVE_SPI0_FFMT 100UL #define METAL_SIFIVE_SPI0_IE 112UL #define METAL_SIFIVE_SPI0_IP 116UL /* From teststatus@4000 */ #define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL #define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL #define METAL_SIFIVE_TEST0_4000_SIZE 4096UL #define METAL_SIFIVE_TEST0_0_SIZE 4096UL #define METAL_SIFIVE_TEST0 #define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL /* From serial@10010000 */ #define METAL_SIFIVE_UART0_10010000_BASE_ADDRESS 268500992UL #define METAL_SIFIVE_UART0_0_BASE_ADDRESS 268500992UL #define METAL_SIFIVE_UART0_10010000_SIZE 4096UL #define METAL_SIFIVE_UART0_0_SIZE 4096UL /* From serial@10011000 */ #define METAL_SIFIVE_UART0_10011000_BASE_ADDRESS 268505088UL #define METAL_SIFIVE_UART0_1_BASE_ADDRESS 268505088UL #define METAL_SIFIVE_UART0_10011000_SIZE 4096UL #define METAL_SIFIVE_UART0_1_SIZE 4096UL #define METAL_SIFIVE_UART0 #define METAL_SIFIVE_UART0_TXDATA 0UL #define METAL_SIFIVE_UART0_RXDATA 4UL #define METAL_SIFIVE_UART0_TXCTRL 8UL #define METAL_SIFIVE_UART0_RXCTRL 12UL #define METAL_SIFIVE_UART0_IE 16UL #define METAL_SIFIVE_UART0_IP 20UL #define METAL_SIFIVE_UART0_DIV 24UL #endif /* SIFIVE_HIFIVE_UNLEASHED____METAL_PLATFORM_H*/