blob: 75dc2ddd99ba806b3446e9ce6a5bb40465e70014 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
|
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
/* [XXXXX] 20-05-2019 14-26-10 */
/* ----------------------------------- */
#ifndef COREIP_E21_ARTY__METAL_PLATFORM_H
#define COREIP_E21_ARTY__METAL_PLATFORM_H
/* From clock@0 */
#define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 32500000UL
#define METAL_FIXED_CLOCK
/* From pmp@0 */
#define METAL_RISCV_PMP_0_NUM_REGIONS 4UL
#define METAL_RISCV_PMP
/* From interrupt_controller@2000000 */
#define METAL_SIFIVE_CLIC0_2000000_BASE_ADDRESS 33554432UL
#define METAL_SIFIVE_CLIC0_0_BASE_ADDRESS 33554432UL
#define METAL_SIFIVE_CLIC0_2000000_SIZE 16777216UL
#define METAL_SIFIVE_CLIC0_0_SIZE 16777216UL
#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTS 153UL
#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMINTS 153UL
#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMLEVELS 16UL
#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMLEVELS 16UL
#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTBITS 2UL
#define METAL_SIFIVE_CLIC0_0_SIFIVE_NUMINTBITS 2UL
#define METAL_SIFIVE_CLIC0
#define METAL_SIFIVE_CLIC0_MSIP_BASE 0UL
#define METAL_SIFIVE_CLIC0_MTIMECMP_BASE 16384UL
#define METAL_SIFIVE_CLIC0_MTIME 49144UL
#define METAL_SIFIVE_CLIC0_CLICINTIP_BASE 0UL
#define METAL_SIFIVE_CLIC0_CLICINTIE_BASE 1024UL
#define METAL_SIFIVE_CLIC0_CLICINTCTL_BASE 2048UL
#define METAL_SIFIVE_CLIC0_CLICCFG 3072UL
#define METAL_SIFIVE_CLIC0_MMODE_APERTURE 8388608UL
#define METAL_SIFIVE_CLIC0_HSMODE_APERTURE 10485760UL
#define METAL_SIFIVE_CLIC0_SMODE_APERTURE 12582912UL
#define METAL_SIFIVE_CLIC0_UMODE_APERTURE 14680064UL
/* From global_external_interrupts */
#define METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0
/* From gpio@20002000 */
#define METAL_SIFIVE_GPIO0_20002000_BASE_ADDRESS 536879104UL
#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 536879104UL
#define METAL_SIFIVE_GPIO0_20002000_SIZE 4096UL
#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL
#define METAL_SIFIVE_GPIO0
#define METAL_SIFIVE_GPIO0_VALUE 0UL
#define METAL_SIFIVE_GPIO0_INPUT_EN 4UL
#define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL
#define METAL_SIFIVE_GPIO0_PORT 12UL
#define METAL_SIFIVE_GPIO0_PUE 16UL
#define METAL_SIFIVE_GPIO0_DS 20UL
#define METAL_SIFIVE_GPIO0_RISE_IE 24UL
#define METAL_SIFIVE_GPIO0_RISE_IP 28UL
#define METAL_SIFIVE_GPIO0_FALL_IE 32UL
#define METAL_SIFIVE_GPIO0_FALL_IP 36UL
#define METAL_SIFIVE_GPIO0_HIGH_IE 40UL
#define METAL_SIFIVE_GPIO0_HIGH_IP 44UL
#define METAL_SIFIVE_GPIO0_LOW_IE 48UL
#define METAL_SIFIVE_GPIO0_LOW_IP 52UL
#define METAL_SIFIVE_GPIO0_IOF_EN 56UL
#define METAL_SIFIVE_GPIO0_IOF_SEL 60UL
#define METAL_SIFIVE_GPIO0_OUT_XOR 64UL
/* From button@0 */
/* From button@1 */
/* From button@2 */
/* From button@3 */
#define METAL_SIFIVE_GPIO_BUTTONS
/* From led@0red */
/* From led@0green */
/* From led@0blue */
#define METAL_SIFIVE_GPIO_LEDS
/* From switch@0 */
/* From switch@1 */
/* From switch@2 */
/* From switch@3 */
#define METAL_SIFIVE_GPIO_SWITCHES
/* From local_external_interrupts_0 */
#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0
/* From pwm@20005000 */
#define METAL_SIFIVE_PWM0_20005000_BASE_ADDRESS 536891392UL
#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 536891392UL
#define METAL_SIFIVE_PWM0_20005000_SIZE 4096UL
#define METAL_SIFIVE_PWM0_0_SIZE 4096UL
#define METAL_SIFIVE_PWM0
#define METAL_SIFIVE_PWM0_PWMCFG 0UL
#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL
#define METAL_SIFIVE_PWM0_PWMS 16UL
#define METAL_SIFIVE_PWM0_PWMCMP0 32UL
#define METAL_SIFIVE_PWM0_PWMCMP1 36UL
#define METAL_SIFIVE_PWM0_PWMCMP2 40UL
#define METAL_SIFIVE_PWM0_PWMCMP3 44UL
/* From spi@20004000 */
#define METAL_SIFIVE_SPI0_20004000_BASE_ADDRESS 536887296UL
#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 536887296UL
#define METAL_SIFIVE_SPI0_20004000_SIZE 4096UL
#define METAL_SIFIVE_SPI0_0_SIZE 4096UL
#define METAL_SIFIVE_SPI0
#define METAL_SIFIVE_SPI0_SCKDIV 0UL
#define METAL_SIFIVE_SPI0_SCKMODE 4UL
#define METAL_SIFIVE_SPI0_CSID 16UL
#define METAL_SIFIVE_SPI0_CSDEF 20UL
#define METAL_SIFIVE_SPI0_CSMODE 24UL
#define METAL_SIFIVE_SPI0_DELAY0 40UL
#define METAL_SIFIVE_SPI0_DELAY1 44UL
#define METAL_SIFIVE_SPI0_FMT 64UL
#define METAL_SIFIVE_SPI0_TXDATA 72UL
#define METAL_SIFIVE_SPI0_RXDATA 76UL
#define METAL_SIFIVE_SPI0_TXMARK 80UL
#define METAL_SIFIVE_SPI0_RXMARK 84UL
#define METAL_SIFIVE_SPI0_FCTRL 96UL
#define METAL_SIFIVE_SPI0_FFMT 100UL
#define METAL_SIFIVE_SPI0_IE 112UL
#define METAL_SIFIVE_SPI0_IP 116UL
/* From teststatus@4000 */
#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL
#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL
#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL
#define METAL_SIFIVE_TEST0_0_SIZE 4096UL
#define METAL_SIFIVE_TEST0
#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL
/* From serial@20000000 */
#define METAL_SIFIVE_UART0_20000000_BASE_ADDRESS 536870912UL
#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 536870912UL
#define METAL_SIFIVE_UART0_20000000_SIZE 4096UL
#define METAL_SIFIVE_UART0_0_SIZE 4096UL
#define METAL_SIFIVE_UART0
#define METAL_SIFIVE_UART0_TXDATA 0UL
#define METAL_SIFIVE_UART0_RXDATA 4UL
#define METAL_SIFIVE_UART0_TXCTRL 8UL
#define METAL_SIFIVE_UART0_RXCTRL 12UL
#define METAL_SIFIVE_UART0_IE 16UL
#define METAL_SIFIVE_UART0_IP 20UL
#define METAL_SIFIVE_UART0_DIV 24UL
#endif /* COREIP_E21_ARTY__METAL_PLATFORM_H*/
|
