1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
|
#ifndef ASSEMBLY
#ifndef SIFIVE_HIFIVE1__METAL_H
#define SIFIVE_HIFIVE1__METAL_H
#ifdef __METAL_MACHINE_MACROS
/* To Satisfy libmetal build */
#ifndef __METAL_CLIC_SUBINTERRUPTS
#define __METAL_CLIC_SUBINTERRUPTS 0
#endif
#endif
#ifndef __METAL_MACHINE_MACROS
#define __METAL_CLINT_2000000_INTERRUPTS 2
#define METAL_MAX_CLINT_INTERRUPTS __METAL_CLINT_2000000_INTERRUPTS
#define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1
#define METAL_MAX_PLIC_INTERRUPTS __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS
#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16
#define METAL_MAX_LOCAL_EXT_INTERRUPTS __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS
#define __METAL_GPIO_10012000_INTERRUPTS 16
#define METAL_MAX_GPIO_INTERRUPTS __METAL_GPIO_10012000_INTERRUPTS
#define __METAL_SERIAL_10013000_INTERRUPTS 1
#define METAL_MAX_UART_INTERRUPTS 1
#include <metal/drivers/riscv,cpu.h>
#include <metal/drivers/riscv,clint0.h>
#include <metal/drivers/riscv,plic0.h>
#include <metal/drivers/fixed-clock.h>
#include <metal/drivers/sifive,fe310-g000,pll.h>
#include <metal/drivers/sifive,fe310-g000,prci.h>
#include <metal/drivers/sifive,fe310-g000,hfxosc.h>
#include <metal/drivers/sifive,fe310-g000,hfrosc.h>
#include <metal/drivers/sifive,gpio0.h>
#include <metal/drivers/sifive,uart0.h>
#include <metal/drivers/sifive,local-external-interrupts0.h>
/* From cpu@0 */
asm (".weak __metal_dt_cpu_0");
struct __metal_driver_cpu __metal_dt_cpu_0;
/* From clint@2000000 */
asm (".weak __metal_dt_clint_2000000");
struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
/* From interrupt_controller@c000000 */
asm (".weak __metal_dt_interrupt_controller_c000000");
struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000;
/* From interrupt_controller */
asm (".weak __metal_dt_interrupt_controller");
struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller;
/* From clock@0 */
asm (".weak __metal_dt_clock_0");
struct __metal_driver_fixed_clock __metal_dt_clock_0;
/* From clock@2 */
asm (".weak __metal_dt_clock_2");
struct __metal_driver_fixed_clock __metal_dt_clock_2;
/* From clock@5 */
asm (".weak __metal_dt_clock_5");
struct __metal_driver_fixed_clock __metal_dt_clock_5;
/* From local_external_interrupts_0 */
asm (".weak __metal_dt_local_external_interrupts_0");
struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0;
/* From clock@4 */
asm (".weak __metal_dt_clock_4");
struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4;
/* From prci@10008000 */
asm (".weak __metal_dt_prci_10008000");
struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000;
/* From clock@1 */
asm (".weak __metal_dt_clock_1");
struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1;
/* From clock@3 */
asm (".weak __metal_dt_clock_3");
struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3;
/* From gpio@10012000 */
asm (".weak __metal_dt_gpio_10012000");
struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000;
/* From serial@10013000 */
asm (".weak __metal_dt_serial_10013000");
struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000;
/* From cpu@0 */
struct __metal_driver_cpu __metal_dt_cpu_0 = {
.vtable = &__metal_driver_vtable_cpu,
.cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable,
.timebase = 1000000UL,
.interrupt_controller = &__metal_dt_interrupt_controller.controller,
};
/* From cpu@0 */
#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu)
#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu)
/* From clock@0 */
struct __metal_driver_fixed_clock __metal_dt_clock_0 = {
.vtable = &__metal_driver_vtable_fixed_clock,
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
.rate = 16000000UL,
};
/* From clock@2 */
struct __metal_driver_fixed_clock __metal_dt_clock_2 = {
.vtable = &__metal_driver_vtable_fixed_clock,
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
.rate = 72000000UL,
};
/* From clock@5 */
struct __metal_driver_fixed_clock __metal_dt_clock_5 = {
.vtable = &__metal_driver_vtable_fixed_clock,
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
.rate = 32000000UL,
};
/* From interrupt_controller */
struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = {
.vtable = &__metal_driver_vtable_riscv_cpu_intc,
.controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable,
.init_done = 0,
.interrupt_controller = 1,
};
/* From interrupt_controller */
#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller)
#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller)
/* From clint@2000000 */
struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
.vtable = &__metal_driver_vtable_riscv_clint0,
.controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable,
.control_base = 33554432UL,
.control_size = 65536UL,
.init_done = 0,
.num_interrupts = METAL_MAX_CLINT_INTERRUPTS,
.interrupt_parent = &__metal_dt_interrupt_controller.controller,
.interrupt_lines[0] = 3,
.interrupt_lines[1] = 7,
};
/* From clint@2000000 */
#define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller)
#define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller)
/* From local_external_interrupts_0 */
struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = {
.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0,
.irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable,
.init_done = 0,
/* From interrupt_controller */
.interrupt_parent = &__metal_dt_interrupt_controller.controller,
.num_interrupts = METAL_MAX_LOCAL_EXT_INTERRUPTS,
.interrupt_lines[0] = 16,
.interrupt_lines[1] = 17,
.interrupt_lines[2] = 18,
.interrupt_lines[3] = 19,
.interrupt_lines[4] = 20,
.interrupt_lines[5] = 21,
.interrupt_lines[6] = 22,
.interrupt_lines[7] = 23,
.interrupt_lines[8] = 24,
.interrupt_lines[9] = 25,
.interrupt_lines[10] = 26,
.interrupt_lines[11] = 27,
.interrupt_lines[12] = 28,
.interrupt_lines[13] = 29,
.interrupt_lines[14] = 30,
.interrupt_lines[15] = 31,
};
/* From local_external_interrupts_0 */
#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc)
#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc)
/* From interrupt_controller@c000000 */
struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
.vtable = &__metal_driver_vtable_riscv_plic0,
.controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable,
.init_done = 0,
/* From interrupt_controller */
.interrupt_parent = &__metal_dt_interrupt_controller.controller,
.interrupt_line = 11UL,
.control_base = 201326592UL,
.control_size = 67108864UL,
.max_priority = 7UL,
.num_interrupts = 26UL,
.interrupt_controller = 1,
};
/* From interrupt_controller@c000000 */
#define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
/* From clock@4 */
struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = {
.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll,
.clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll.clock,
/* From clock@3 */
.pllsel0 = &__metal_dt_clock_3.clock,
/* From clock@1 */
.pllref = &__metal_dt_clock_1.clock,
/* From prci@10008000 */
.divider_base = &__metal_dt_prci_10008000,
.divider_offset = 12UL,
/* From prci@10008000 */
.config_base = &__metal_dt_prci_10008000,
.config_offset = 8UL,
.init_rate = 16000000UL,
};
/* From clock@4 */
#define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4)
#define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4)
/* From prci@10008000 */
struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = {
.vtable = &__metal_driver_vtable_sifive_fe310_g000_prci,
.base = 268468224UL,
.size = 32768UL,
};
/* From clock@1 */
struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1 = {
.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc,
.clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc.clock,
/* From clock@0 */
.ref = &__metal_dt_clock_0.clock,
/* From prci@10008000 */
.config_base = &__metal_dt_prci_10008000,
.config_offset = 4UL,
};
/* From clock@3 */
struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3 = {
.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc,
.clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc.clock,
/* From clock@2 */
.ref = &__metal_dt_clock_2.clock,
/* From prci@10008000 */
.config_base = &__metal_dt_prci_10008000,
.config_offset = 0UL,
};
/* From gpio@10012000 */
struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000 = {
.vtable = &__metal_driver_vtable_sifive_gpio0,
.base = 268509184UL,
.size = 4096UL,
/* From interrupt_controller@c000000 */
.interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller,
.num_interrupts = METAL_MAX_GPIO_INTERRUPTS,
.interrupt_lines[0] = 7,
.interrupt_lines[1] = 8,
.interrupt_lines[2] = 9,
.interrupt_lines[3] = 10,
.interrupt_lines[4] = 11,
.interrupt_lines[5] = 12,
.interrupt_lines[6] = 13,
.interrupt_lines[7] = 14,
.interrupt_lines[8] = 15,
.interrupt_lines[9] = 16,
.interrupt_lines[10] = 17,
.interrupt_lines[11] = 18,
.interrupt_lines[12] = 19,
.interrupt_lines[13] = 20,
.interrupt_lines[14] = 21,
.interrupt_lines[15] = 22,
};
/* From serial@10013000 */
struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000 = {
.vtable = &__metal_driver_vtable_sifive_uart0,
.uart.vtable = &__metal_driver_vtable_sifive_uart0.uart,
.control_base = 268513280UL,
.control_size = 4096UL,
/* From clock@4 */
.clock = &__metal_dt_clock_4.clock,
/* From gpio@10012000 */
.pinmux = &__metal_dt_gpio_10012000,
.pinmux_output_selector = 196608UL,
.pinmux_source_selector = 196608UL,
/* From interrupt_controller@c000000 */
.interrupt_parent = &__metal_dt_interrupt_controller_c000000.controller,
.num_interrupts = METAL_MAX_UART_INTERRUPTS,
.interrupt_line = 5UL,
};
/* From serial@10013000 */
#define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_10013000.uart)
#define __METAL_DT_SERIAL_10013000_HANDLE (&__metal_dt_serial_10013000.uart)
#define __METAL_DT_STDOUT_UART_BAUD 115200
#define __METAL_DT_MAX_HARTS 1
asm (".weak __metal_cpu_table");
struct __metal_driver_cpu *__metal_cpu_table[] = {
&__metal_dt_cpu_0};
#define __METAL_DT_MAX_LEDS 0
asm (".weak __metal_led_table");
struct __metal_driver_sifive_gpio_led *__metal_led_table[] = {
NULL };
#define __METAL_DT_MAX_BUTTONS 0
asm (".weak __metal_button_table");
struct __metal_driver_sifive_gpio_button *__metal_button_table[] = {
NULL };
#define __METAL_DT_MAX_SWITCHES 0
asm (".weak __metal_switch_table");
struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = {
NULL };
#endif
#endif /*METAL__MACHINE__SIFIVE_HIFIVE1__METAL_H*/
#endif/*ASSEMBLY*/
|