summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBunnaroath Sou <35707615+bsousi5@users.noreply.github.com>2019-03-26 15:18:55 -0700
committerGitHub <noreply@github.com>2019-03-26 15:18:55 -0700
commitfff485c3cf238d8edf90217ee729227f30da8ec1 (patch)
tree3fa7d52ca1e5caae632b5d04411235da0f3f40cb
parentedd89ecddd9abea9fa47b91487bf6bb8360b1c66 (diff)
parent0045570bc60f197a8c9e63d4330e1fba9238ce83 (diff)
Merge pull request #218 from sifive/pub-dhrystone
Making dhrystone public
-rw-r--r--.gitmodules3
-rw-r--r--README.md12
-rw-r--r--bsp/coreip-e31-arty/settings.mk2
-rw-r--r--bsp/coreip-e31-rtl/settings.mk2
-rw-r--r--doc/sphinx/contents.rst5
m---------software/dhrystone0
6 files changed, 22 insertions, 2 deletions
diff --git a/.gitmodules b/.gitmodules
index bd6e9c4..5c6f9e1 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -40,3 +40,6 @@
[submodule "software/sifive-welcome"]
path = software/sifive-welcome
url = https://github.com/sifive/sifive-welcome
+[submodule "software/dhrystone"]
+ path = software/dhrystone
+ url = https://github.com/sifive/benchmark-dhrystone
diff --git a/README.md b/README.md
index 2b5a36b..1773137 100644
--- a/README.md
+++ b/README.md
@@ -92,6 +92,8 @@ operating systems to RISC-V.
- Demonstrates how to configure a Physical Memory Protection (PMP) region
- sifive-welcome
- Prints the SiFive banner and blinks LEDs
+ - dhrystone
+ - "Dhrystone" Benchmark Program by Reinhold P. Weicker
### Setting up the SDK ###
@@ -181,6 +183,16 @@ with the `release` configuration, you would instead run the command
make PROGRAM=timer-interrupt TARGET=coreip-s51-arty CONFIGURATION=release software
```
+##### Building an Benchmark Program ####
+
+Building a benchmark program is slightly special in that certain section is
+required to be loaded in specific memory region. A specialize linker file has
+been created for its optimal run.
+
+```
+make PROGRAM=dhrystone TARGET=coreip-e31-arty LINK_TARGET=ramrodata software
+```
+
#### Uploading to the Target Board ####
```
diff --git a/bsp/coreip-e31-arty/settings.mk b/bsp/coreip-e31-arty/settings.mk
index 0b9c2cb..c2a2547 100644
--- a/bsp/coreip-e31-arty/settings.mk
+++ b/bsp/coreip-e31-arty/settings.mk
@@ -1,5 +1,5 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
-RISCV_CMODEL=medlow
+RISCV_CMODEL=medany
TARGET_TAGS=fpga openocd
diff --git a/bsp/coreip-e31-rtl/settings.mk b/bsp/coreip-e31-rtl/settings.mk
index f60f250..50ec3c7 100644
--- a/bsp/coreip-e31-rtl/settings.mk
+++ b/bsp/coreip-e31-rtl/settings.mk
@@ -1,6 +1,6 @@
RISCV_ARCH=rv32imac
RISCV_ABI=ilp32
-RISCV_CMODEL=medlow
+RISCV_CMODEL=medany
COREIP_MEM_WIDTH=32
diff --git a/doc/sphinx/contents.rst b/doc/sphinx/contents.rst
index ed1b6af..ab751d9 100644
--- a/doc/sphinx/contents.rst
+++ b/doc/sphinx/contents.rst
@@ -134,3 +134,8 @@ The example programs can be found under the ``software/`` directory.
- example-spi
- Demonstrates how to use the SPI API to transfer bytes to a peripheral
+
+- dhrystone
+
+ - "Dhrystone" Benchmark Program by Reinhold P. Weicker
+
diff --git a/software/dhrystone b/software/dhrystone
new file mode 160000
+Subproject 1472b5092fa52551670908aa15d48eb974ccd45