summaryrefslogtreecommitdiff
path: root/bsp/sifive-hifive1-revb
diff options
context:
space:
mode:
authorNathaniel Graff <nathaniel.graff@sifive.com>2019-05-21 10:51:18 -0700
committerNathaniel Graff <nathaniel.graff@sifive.com>2019-05-21 10:54:29 -0700
commitb87018b8a5afa98a6f799527d9a4417290349a4a (patch)
treebfd29bb74aeade1c864ef431691b86e2ea0ab442 /bsp/sifive-hifive1-revb
parent1054095bdf4d5a989ed1267051cc6fd6eefc2fcd (diff)
Modify BSP DTSs to use riscv,pmpregions property
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/sifive-hifive1-revb')
-rw-r--r--bsp/sifive-hifive1-revb/design.dts7
1 files changed, 1 insertions, 6 deletions
diff --git a/bsp/sifive-hifive1-revb/design.dts b/bsp/sifive-hifive1-revb/design.dts
index 0e48622..970d3be 100644
--- a/bsp/sifive-hifive1-revb/design.dts
+++ b/bsp/sifive-hifive1-revb/design.dts
@@ -25,6 +25,7 @@
next-level-cache = <&spi0>;
reg = <0>;
riscv,isa = "rv32imac";
+ riscv,pmpregions = <8>;
sifive,dtim = <&dtim>;
status = "okay";
timebase-frequency = <1000000>;
@@ -43,12 +44,6 @@
#clock-cells = <1>;
compatible = "sifive,hifive1";
ranges;
-
- pmp: pmp@0 {
- compatible = "riscv,pmp";
- regions = <8>;
- };
-
hfxoscin: clock@0 {
#clock-cells = <0>;
compatible = "fixed-clock";