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authorAndrew Waterman <andrew@sifive.com>2017-01-03 17:58:18 -0800
committerAndrew Waterman <andrew@sifive.com>2017-01-03 18:53:37 -0800
commit628d2b3559be5e9e651801d289a075d68df820e8 (patch)
treedae389ef596acd1f773b647d7c6cc4bbcc74a732 /software/dhrystone
parent005b1a8f84ff743710ebd693b70d208da583098d (diff)
Compile Dhrystone without RVC
Branch target misalignment reduces performance by about 10%.
Diffstat (limited to 'software/dhrystone')
-rw-r--r--software/dhrystone/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/software/dhrystone/Makefile b/software/dhrystone/Makefile
index a55b1ec..78a7b23 100644
--- a/software/dhrystone/Makefile
+++ b/software/dhrystone/Makefile
@@ -5,7 +5,7 @@ C_SRCS := dhry_stubs.c dhry_printf.c
HEADERS := dhry.h
DHRY_SRCS := dhry_1.c dhry_2.c
-DHRY_CFLAGS := -O2 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit
+DHRY_CFLAGS := -O2 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit -march=rv32ima
XLEN ?= 32
CFLAGS := -Os -fno-common