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authorSilvan Jegen <s.jegen@gmail.com>2019-08-24 16:45:22 +0200
committerSilvan Jegen <s.jegen@gmail.com>2019-08-24 16:45:22 +0200
commit71809c8c794e22d80559671c06fa2e6db8e2df60 (patch)
tree34c719ce82134d58352e6975ad5b30aadb548844 /software/first
parent3c1be20f6c13ec70083dfad1dcb007f9c2ffef78 (diff)
setup_timer_irq: load ISR with correct instruction
We also make sure that the alignment of the ISR is correct. Thanks to the internet for this one as well!
Diffstat (limited to 'software/first')
-rw-r--r--software/first/setup_timer_irq.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/software/first/setup_timer_irq.S b/software/first/setup_timer_irq.S
index 8ca0370..84ecde8 100644
--- a/software/first/setup_timer_irq.S
+++ b/software/first/setup_timer_irq.S
@@ -9,7 +9,7 @@ setup_timer_irq:
addi sp, sp, -16 # Allocate stack frame
sw ra, 12(sp) # save return address to the stack
- lw t0, irq_handler # load address of irq_handler
+ la t0, irq_handler # load address of irq_handler
slli t0, t0, 1 # shift address left by one; LSB will be 0 which is direct mode (what we want)
csrw mtvec, t0 # write handler address and mode
@@ -50,6 +50,7 @@ setup_timer_irq:
# mret
+.align 6
irq_handler:
# save only the registers we use in this function
addi sp, sp, -28 # Allocate stack frame